Difference between revisions of "PDP-11/23-PLUS"
From Computer History Wiki
m (→External links: +PDP-11/23-PLUS System Manual) |
m (Exact DEC name) |
||
| Line 1: | Line 1: | ||
{{Infobox Machine| | {{Infobox Machine| | ||
| − | name=PDP-11/23 PLUS | | + | name=PDP-11/23-PLUS | |
image=PDP1123PLUS-01.jpeg | | image=PDP1123PLUS-01.jpeg | | ||
| − | caption=PDP-11/23 PLUS with two RL02s, TK50, and third party SCSI | | + | caption=PDP-11/23-PLUS with two RL02s, TK50, and third party SCSI | |
manufacturer=[[Digital Equipment Corporation]] | | manufacturer=[[Digital Equipment Corporation]] | | ||
word size= 16 bit | | word size= 16 bit | | ||
| Line 13: | Line 13: | ||
The '''PDP-11/23-PLUS''', introduced in November 1981, introduced an integrated solution on a single [[DEC card form factor |quad]]-width [[QBUS]] board, which included [[F-11 chip set|F-11]] [[Central Processing Unit|CPU]], [[memory management]] unit, a socket for inserting an [[KEF11-A floating point chip|KEF11-A]] [[floating point processor|floating point unit]], and two [[asynchronous serial line]]s, which had a maximum speed of 19,200 baud. | The '''PDP-11/23-PLUS''', introduced in November 1981, introduced an integrated solution on a single [[DEC card form factor |quad]]-width [[QBUS]] board, which included [[F-11 chip set|F-11]] [[Central Processing Unit|CPU]], [[memory management]] unit, a socket for inserting an [[KEF11-A floating point chip|KEF11-A]] [[floating point processor|floating point unit]], and two [[asynchronous serial line]]s, which had a maximum speed of 19,200 baud. | ||
| − | === Essential parts that make up a PDP 11/23 PLUS === | + | === Essential parts that make up a PDP 11/23-PLUS === |
* M8189 [[KDF11-B CPU]] board | * M8189 [[KDF11-B CPU]] board | ||
Revision as of 12:23, 15 May 2022
| PDP-11/23-PLUS | |
 PDP-11/23-PLUS with two RL02s, TK50, and third party SCSI | |
| Manufacturer: | Digital Equipment Corporation |
|---|---|
| Year Introduced: | November 1981 |
| Word Size: | 16 bit |
| Physical Address Size: | 22 bit |
| Virtual Address Size: | 16 bit |
| Bus Architecture: | QBUS |
The PDP-11/23-PLUS, introduced in November 1981, introduced an integrated solution on a single quad-width QBUS board, which included F-11 CPU, memory management unit, a socket for inserting an KEF11-A floating point unit, and two asynchronous serial lines, which had a maximum speed of 19,200 baud.
Essential parts that make up a PDP 11/23-PLUS
- M8189 KDF11-B CPU board
- 22-bit QBUS backplane
