MCA20 Cache

The MCA20 Cache is the optional original main memory cache, used only for the fetches of instructions and operands, etc, for the early KL10 CPU. (It was later replaced by the improved MCA25 KL Cache/Paging Upgrade‎ on later KL10's.) Many KL10 CPU models included the MCA20 by default, but there were some - e.g. the KL10-C - on which it was optional.

There are actually two completely separate major caches in the KL10 (the KL10-Based Technical Manual says - in Section A.1 - that there are actually four caches in total, but it is not clear what the other two are): the 'main memory' cache (above) and the 'paging' cache (used for the operation of the KL10's virtual memory mechanism, e.g. holding page table entries). The MCA20 includes only the former; the latter is included on all KL10's, as part of the MBox unit of the CPU. (Without the cached page table entries, each paged memory reference would take several memory cycles (the KL10 TM says up to five - in Section A.3 - but I can only think of three: the UPT pointer to the page table, the page table entry, and then the actual memory reference), cutting the effective memory bandwidth by large factor, which is clearly undesirable.)

The MCA20 cache is a 2,048 word cache, organized into 512 4-word location sets, because it operates on 4-word blocks (although the requested word will be handled first on refills). It is organized as a 'four-way set associative' cache; it is divided into 4 'quarters', and any location in main memory was associated with one entry (location set) in each quarter. When an entry is needed for new contents, it is selected by LRU within each group of four entries. The cache is not 'write-through' on write operations; modified words have to be written out before their entries can be re-used. The 'paging' cache has 512 entries; the entry for each page in a process' virtual address space can be stored in at most one cache entry (i.e. it is 'one-way set associative').

The MCA20 consists of 6 hex cards, of 3 types:

• M8514 - Cache Address
• M8515 - Cache Extension
• 4 x M8521 - Cache Data

These only hold the data of the cache; the control is elsewhere (including on the M8513 Cache Control card), and included in all KL10 CPUs.

External links

• KL10-Based Technical Manual (EK-OKL10-TM-002)
• MBox Storage Controller Unit Description (EK-MBOX-UD-004) - the 'paging' cache is covered in Section 1.2, and the MCA20 in 1.3, with introductions to both in Section 1.1
• MCA20 Field Maintenance Print Set (MP00267)