Difference between revisions of "TX-0"
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The '''TX-0''' was a [[transistor]] computer (reportedly the first ever built), at the MIT Lincoln laboratory. Predecessor to the [[TX-2]] and an influence on the [[PDP-1]] design. It was in some sense a successor to the [[Memory Test Computer]], itself a spin-off of the pioneering [[Whirlwind]]. | The '''TX-0''' was a [[transistor]] computer (reportedly the first ever built), at the MIT Lincoln laboratory. Predecessor to the [[TX-2]] and an influence on the [[PDP-1]] design. It was in some sense a successor to the [[Memory Test Computer]], itself a spin-off of the pioneering [[Whirlwind]]. | ||
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==Registers== | ==Registers== | ||
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| 11 || OPR ''x'' || Execute the instruction. | | 11 || OPR ''x'' || Execute the instruction. | ||
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==External links== | ==External links== | ||
| − | * [http://bitsavers.org/pdf/mit/tx-0/ TX-0] - documents at [[Bitsavers]] | + | * [http://bitsavers.org/pdf/mit/tx-0/ TX-0] - documents at [[Bitsavers]] |
| + | ** [http://bitsavers.org/pdf/mit/tx-0/TX-0_history_1984.txt TX-0 history] | ||
* [https://dspace.mit.edu/bitstream/handle/1721.1/4132/RLE-TR-627-42827671.pdf RLE-TR-627 TX-0 Computer History] | * [https://dspace.mit.edu/bitstream/handle/1721.1/4132/RLE-TR-627-42827671.pdf RLE-TR-627 TX-0 Computer History] | ||
* [https://www.computerhistory.org/pdp-1/2e1b209cb40237b91228cdf26a60e3f8/ MIT TX-0 Computer] | * [https://www.computerhistory.org/pdp-1/2e1b209cb40237b91228cdf26a60e3f8/ MIT TX-0 Computer] | ||
Revision as of 13:39, 27 February 2024
The TX-0 was a transistor computer (reportedly the first ever built), at the MIT Lincoln laboratory. Predecessor to the TX-2 and an influence on the PDP-1 design. It was in some sense a successor to the Memory Test Computer, itself a spin-off of the pioneering Whirlwind.
Registers
These are the registers in the original design. Later updates changed some register widths and added registers.
| Name | Size (bits) | Meaning |
|---|---|---|
| AC | 18 | Accumulator |
| MBR | 18 | Memory buffer register |
| MAR | 16 | Memory address register |
| PC | 16 | Program counter |
| IR | 2 | Instruction register |
| LR | 18 | Live register |
| TBR | 18 | Toggle switch buffer register |
| TAC | 18 | Toggle switch accumulator |
Test mode
The console has a switch to set test mode in which operations are taken from the TBR. The operations are similar to regular instructions, but with a different interpretation:
| TBR 0-1 | Instruction | Meaning |
|---|---|---|
| 00 | STO x | Store TAC in memory location x. |
| 01 | ADD x | Add memory location x to AC. (Check MBR to examine.) |
| 10 | TRN x | Change to normal mode and start running at location x. |
| 11 | OPR x | Execute the instruction. |
External links
- TX-0 - documents at Bitsavers
- RLE-TR-627 TX-0 Computer History
- MIT TX-0 Computer
- C. Gordon Bell, Gerald Butler, Robert Gray, John E. Mcnamara, Donald Vonada, and Ronald Wilson, The PDP-1 and Other 18-Bit Computers, in C. Gordon Bell, J. Craig Mudge, John. E. McNamara, Computer Engineering: A DEC View of Hardware Systems Design, Digital Press, Bedford, 1978 - Some material on the TX-0, and also covers its descendants (including the PDP-1)
- The LINC Was Early and Small - lengthy personal memoir by Wesley Clark; it also covers the TX-0
