MM11-U core memory
The MM11-U was a popular, and fairly common, 32 Kbyte core memory for the early PDP-11 UNIBUS machines. An MM11-U was composed of a four board set:
- G114 - hex-format sense/inhibit module
- G235 - hex-format XY Drive, current source, decode module
- H217-D - hex-format core stack
- M7293 - quad-format timing and control module
There was also a parity-capable variant, the MM11-UP, which added an M7259 dual-format parity controller, and substituted an H217-C (with two more bits per word) for the H217-D.
The MM11-U required a custom backplane, although some CPU's (e.g. the PDP-11/05) had processor backplanes wired to hold an MM11-U set as well as the CPU.
The MF11-U was a nine-slot backplane plus a single MM11-U board set; the backplane has room for one more MM11-U board set. The MF11-UP is the parity version.
Parity and non-parity backplane configuration
Installing an MM11-U (non-parity) module set in an MF11-U backplane configured for parity will cause the machine to hang when that memory is referenced.
This is because during parity operation, the SSYN signal is routed through the M7259 Parity Controller board, and that only issues the SSYN once it has checked that the parity is OK. On non-parity installations, the 'proto-SSYN' from the rest of the memory is just hard-wired straight to the output to the UNIBUS.
That requires a jumper on the backplane for non-parity memory: it runs from pin B1U1 to B2U1. This jumper should not be present for parity memory.
