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• IBM 650
  The '''IBM 650''' (formally the '''Type 650 Magnetic Drum Data-Processing Machine''') was one of [[International Business Machines|IBM]]'s first comp ...serial, not bit-, though). The two internal [[register]]s in the [[Central Processing Unit|CPU]] (a 10-digit 'distributor', and a 20-digit [[accumulator]]) used
  4 KB (620 words) - 21:08, 18 March 2024
• IBM 7070
  ...though), and had three internal word-length [[register]]s in the [[Central Processing Unit|CPU]]; they used [[magnetic field|magnetic]] [[memory]]. Decimal [[flo ...[[magnetic tape drive]]s could be connected to a 7070, via two separate [[data channel]]s; the 729II could read 15,000 characters per second, the 729IV co
  3 KB (478 words) - 14:49, 9 April 2024
• Address bus
  ...ny buses contain an address bus as part of their structure, along with a [[data bus]], etc.
  370 bytes (58 words) - 04:31, 13 December 2018
• Data bus
  ...ing Unit|CPU]], but possibly a [[device controller]], Many buses contain a data bus as part of their structure, along with a [[address bus]], etc.
  365 bytes (59 words) - 04:32, 13 December 2018
• Superscalar
  A '''superscalar''' [[Central Processing Unit|CPU]] [[architecture]] is one which has more than one [[logic]] unit w ...er renaming]] is used to allow the later one to start as soon as its input data is available, but using a different physical register.
  1 KB (229 words) - 22:56, 9 September 2021
• Channel
  ...put/output|I/O]] operations, off-loading that work from the main [[Central Processing Unit|CPU]]; they are connected to [[peripheral]]s, and usually have direct ...nsiderably from manufacturer to manufacturer: for instance, the Peripheral Processing Units of the [[CDC 6600]] are effectively channels, but they are essentiall
  1 KB (205 words) - 17:18, 9 April 2024
• DF10 Data Channel
  ...to it) to the system's [[PDP-10 I/O Bus|I/O bus]], to allow the [[Central Processing Unit|CPU]] to control it. * Discard data
  2 KB (390 words) - 07:32, 6 September 2023
• FPF11 floating point processor
  ...(the M8188) which plugs into the [[backplane]] slot next to the [[Central Processing Unit|CPU]] board. It can be plugged into either a [[UNIBUS]] or [[QBUS]] b ...is nothing for it to do; e.g. when the FPF11 does not need it to [[fetch]] data from, or [[store]] it in, [[main memory]].
  2 KB (383 words) - 02:31, 12 October 2022
• LSI-11 chip set
  The '''LSI-11 chip set''' [[Central Processing Unit|CPU]] [[integrated circuit|chip]] set is used in the [[LSI-11 CPUs]] - The chip set consists of a [[data path]] chip, a control chip, and two or three [[microcode]] [[Read-only mem
  5 KB (773 words) - 22:42, 20 December 2023
• KY11-A Programmer's Console
  ...in [[main memory]], and start, [[halt]] and [[single-step]] the [[Central Processing Unit|CPU]]; it also displays substantial amount of information as the machi The 'Address' and 'Data' indicator arrays display memory [[address]]es and data.
  2 KB (386 words) - 01:41, 6 July 2023
• Register renaming
  ...''' is a technique used in the implementation of [[superscalar]] [[Central Processing Unit|processors]], particularly in those using [[out-of-order execution]], ...sters, more than can be named in the instructions - use of these keeps the data in the CPU, where it is quickly accessible. Register renaming is however ne
  1 KB (191 words) - 16:05, 15 December 2018
• UNIX V6 dump analysis
  ...omething happens it can't recover from; or after [[halt]]ing the [[Central Processing Unit|CPU]]. ...nd the per-process kernel [[stack]]), as well as the user's data (both the data area, and the user stack) in a single contiguous block in main memory, and
  4 KB (719 words) - 12:07, 2 July 2022
• KD11-K CPU
  The '''KD11-K''' was the [[Central Processing Unit|CPU]] of the [[PDP-11/60]]. It provided the [[PDP-11 Memory Management * Data Path (M7874)
  4 KB (536 words) - 12:34, 11 October 2022
• FP11-E Floating Point Processor
  which mounted in slots 8-11 of the [[Central Processing Unit|CPU]]'s [[backplane]]. The main CPU can detect the presence of the FP1 ..., it connected directly to the CPU and is controlled by it; unidirectional data buses are provided to move information (including instructions) from the CP
  1 KB (229 words) - 02:19, 13 October 2022
• MD10 core memory
  ...stem, one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.
  1 KB (231 words) - 13:54, 2 August 2023
• MA10 core memory
  ...ystem, one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.
  1 KB (165 words) - 13:53, 2 August 2023
• MB10 core memory
  ...stem, one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.
  881 bytes (134 words) - 13:53, 2 August 2023
• ME10 core memory
  ...ystem, one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.
  1 KB (181 words) - 13:55, 2 August 2023
• MF10 core memory
  ...least one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.
  2 KB (271 words) - 12:37, 5 November 2023
• MG10 core memory
  ...least one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.
  2 KB (342 words) - 12:33, 5 November 2023

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