User contributions for Jnc

13 November 2023

• 15:5915:59, 13 November 2023 diff hist −4 Talk:KL10 →Optional cache: Source for '5' number
• 12:3512:35, 13 November 2023 diff hist +2,039 Talk:KL10 →Optional cache: new section

12 November 2023

• 22:5522:55, 12 November 2023 diff hist +202 m KL10 →External Links: KL10 Project Technology Goals
• 21:1921:19, 12 November 2023 diff hist +197 KL10 The initial cache was the MCA20
• 20:2820:28, 12 November 2023 diff hist −1 KL10 →Versions: No such thing as a 'Model E'
• 15:1115:11, 12 November 2023 diff hist +634 Talk:KL10 →Clock speed: Apparently more than one clock tick per uprocessor cycle
• 13:5913:59, 12 November 2023 diff hist +28 KL10 Clock speeds in Model A and Model B
• 13:5613:56, 12 November 2023 diff hist +737 Talk:KL10 →Clock speed: new section
• 11:5511:55, 12 November 2023 diff hist +22 KL10 →Well-known KL10's: MC was a very early Model A
• 11:3811:38, 12 November 2023 diff hist +177 m PDP-10 Memory Bus →External links: +decsystem-1080/1090 System Description current
• 11:2211:22, 12 November 2023 diff hist +209 m PDP-10 Memory Bus →External links: +KL10-Based Technical Manual
• 11:1411:14, 12 November 2023 diff hist +210 m DTE20 Ten-Eleven Interface →External links: +KL10-Based Technical Manual current
• 11:0511:05, 12 November 2023 diff hist +199 m RH10 MASSBUS controller →External links: +KL10-Based Physical Description current
• 10:5910:59, 12 November 2023 diff hist +407 m RH20 MASSBUS controller →External links: +manuals current
• 10:4610:46, 12 November 2023 diff hist +197 m DTE20 Ten-Eleven Interface →External links: +decsystem-1080/1090 System Description
• 10:3410:34, 12 November 2023 diff hist +41 N KJ11 Redir - short form current

11 November 2023

• 03:2103:21, 11 November 2023 diff hist 0 KL10 Had TTL and ECL swapped on the S/X busses
• 03:1903:19, 11 November 2023 diff hist +237 m NIA20 Network Interconnect Adapter →External links: +documentation current
• 03:0303:03, 11 November 2023 diff hist +236 m CI20 Computer Interconnect →External links: +documentation
• 02:5702:57, 11 November 2023 diff hist +25 N ARM-10LS Redir - covered there current
• 02:5602:56, 11 November 2023 diff hist +562 Ampex ARM10 Add ARM-10LS current
• 01:2101:21, 11 November 2023 diff hist +235 m RP07 Disk Drive →External links: +RP07 programming info current
• 01:0101:01, 11 November 2023 diff hist +43 N MCA25 Redir - short form current
• 01:0101:01, 11 November 2023 diff hist +2,112 N MCA25 KL Cache/Paging Upgrade Covers the main points

9 November 2023

• 13:4113:41, 9 November 2023 diff hist +344 KL10 Multiple Kbi for bandwidth; useful doc
• 13:1613:16, 9 November 2023 diff hist +6 m DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem Fix dbl redir current
• 13:1013:10, 9 November 2023 diff hist +38 DMA20 Memory Bus Adapter Bandwidth as well as interleaving current

7 November 2023

• 15:5615:56, 7 November 2023 diff hist +60 N KG11 Redir - short name current
• 15:5515:55, 7 November 2023 diff hist +60 N KG11-A Redir - short form current
• 15:5415:54, 7 November 2023 diff hist +1,001 N KG11-A Exclusive-OR and CRC Block Check Option Just the basics current
• 15:2915:29, 7 November 2023 diff hist +30 m DN87/DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem →External links: Bleah - forgot the title current
• 15:2715:27, 7 November 2023 diff hist +176 m DL10 PDP-11 Data Link →External links: +KL10-Based Physical Description current
• 15:1715:17, 7 November 2023 diff hist +88 N DN87 Redir - short form
• 15:1715:17, 7 November 2023 diff hist +88 N DN87S Redir - short name
• 15:1615:16, 7 November 2023 diff hist +88 N DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem Redir - covered there
• 15:1515:15, 7 November 2023 diff hist +94 N DN87 Universal Synchronous/Asynchronous Communications Front End Subsystem Jnc moved page DN87 Universal Synchronous/Asynchronous Communications Front End Subsystem to DN87/DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem: One page covers both current
• 15:1515:15, 7 November 2023 diff hist 0 m DN87/DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem Jnc moved page DN87 Universal Synchronous/Asynchronous Communications Front End Subsystem to DN87/DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem: One page covers both
• 15:1315:13, 7 November 2023 diff hist +1,356 N DN87/DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem Covers the basics
• 14:2814:28, 7 November 2023 diff hist +105 DL10 PDP-11 Data Link Used in DN87

6 November 2023

• 12:1112:11, 6 November 2023 diff hist +71 DL10 PDP-11 Data Link On the KL10, needs both Memory and I/O bus adapters
• 11:3711:37, 6 November 2023 diff hist +225 KL10 →Devices: Low-speed devices were generally attached to a PDP-11 front end
• 10:3410:34, 6 November 2023 diff hist +14 m DIA20 IBus Adapter clarify current

5 November 2023

• 20:2220:22, 5 November 2023 diff hist +196 m PDP-10 →External links: a few more useful sites
• 20:1520:15, 5 November 2023 diff hist +90 m KL10 →External Links: +some interesting discussion of KL10 details
• 19:5519:55, 5 November 2023 diff hist +32 N DIB20 Redir - covered there current
• 19:5419:54, 5 November 2023 diff hist +136 DIA20 IBus Adapter Mention DIB20
• 11:2311:23, 5 November 2023 diff hist +256 KI10 →Busses: KA10-style memories require use of a KI10-M Memory Bus Adapter
• 11:1411:14, 5 November 2023 diff hist +4 m Central Processing Unit +link current
• 10:4810:48, 5 November 2023 diff hist +104 KL10 Could use multiple memory busses in parallel to increase memory bandwidth
• 10:4010:40, 5 November 2023 diff hist +17 MH10 core memory Later CPU's use multiple ports to increase memory bandwidth current