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  • ...[[peripheral]]s. Originally, each specific peripheral was assigned a fixed address for its registers; once the number of different device types became large, ...vices (to mark the end of each group). (Each actual group must start on an address of the required modulus; e.g. if there is one DJ11 and one DH11, the DJ11 w
    3 KB (441 words) - 15:44, 8 February 2023
  • ...[[QBUS]]). Originally, each specific [[peripheral]] was assigned a fixed [[address]] for its vector(s); once the number of different device types became large ...mass storage]] devices, generally [[disk]]s. This probably means that the 'base' unit is assigned a fixed vector, so that [[bootstrap]]s do not have to con
    4 KB (540 words) - 15:43, 8 February 2023
  • ...synchronous serial line]] [[peripheral|interface]] for the [[UNIBUS]]. The base unit, the '''DQ11-DA/EA''', was double-[[buffer]]ed, and used separate rece ! Register !! Abbreviation !! Address
    8 KB (1,222 words) - 04:17, 18 February 2023
  • ! Register !! Abbreviation !! Address The [[address]]es shown are for the first DV11 in a system; additional units are normally
    6 KB (823 words) - 04:24, 18 February 2023
  • The base unit included a [[CPU|Central Processing Unit]], a small amount of [[main m ...n code]], and an optional single byte of immediate data, or two bytes of [[address]].
    5 KB (814 words) - 20:05, 4 June 2023
  • ...ming window, on each UNIBUS, is set by configuration [[jumper]]s. The base address of the outgoing window is set by a [[register]] in the BA11-F. ! Register !! Address
    3 KB (513 words) - 00:01, 14 January 2022
  • ...atching; also allocation of all basic system resources ([[main memory]], [[address space]] units, etc); includes initial [[trap]] and [[interrupt]] handlers, ...BSTJ/vol62-1983/articles/bstj62-1-171.pdf The 3B20D Processor & DMERT As a Base for Telecommunications Operations] (The Bell System Technical Journal, Jan
    5 KB (736 words) - 21:56, 29 September 2022
  • ...el, the interface consists of [[shared memory]]; one page (512 words) at [[address]] 02000 (octal). The memory has some [[meta-data]] and [[ring buffer]]s fo | Address, high 8 bits
    5 KB (698 words) - 08:26, 10 June 2023
  • * Control store address (CSA) The base CPU does support [[floating point]], but implemented entirely in microcode;
    3 KB (519 words) - 03:33, 18 May 2024
  • ADDRESS LINE ADDRESS:0
    28 KB (3,686 words) - 19:40, 16 November 2023
  • * MicroVMS V4.6 Base Kit === Install VMS V4.6 Base Kit ===
    65 KB (7,949 words) - 21:58, 19 August 2023
  • MCTL0 nexus=1, address=20002000 MCTL1 nexus=2, address=20004000
    73 KB (9,059 words) - 20:56, 22 May 2023
  • * The node data base must contain these definitions, or they must be specified in the '''ccr''' ** The [[MAC Address|Ethernet hardware address]] of the target node
    2 KB (341 words) - 20:02, 3 July 2022
  • Copying Base System (ULTBASE030) from tape Verifying Base System (ULTBASE030)
    80 KB (9,795 words) - 09:39, 10 July 2022
  • It must be applied to the 4.6 base kit. What do you want your DECnet address to be? [1.1]: '''1.1'''
    112 KB (13,727 words) - 18:09, 30 January 2024
  • ...or setting their addresses. Host software defines the [[interrupt vector]] address during KDA50 initialization. ! Register !! Abbreviation !! Address
    6 KB (888 words) - 10:56, 31 August 2023
  • ...the [[GE 600 series‎]] family. It is notable mostly for being the design base of the [[GE-645]], a descendant created for the [[Multics]] project (after ...hich there were no limitations on its operation, or Slave mode, in which [[base and bounds]] type [[memory management]] applied.
    2 KB (338 words) - 12:50, 5 January 2023
  • [[Address]]es in the GE-645 were notionally 36 bits wide (it was a 36-bit machine, as ...gment-addressed PC); a Descriptor Base Register (below); and eight Address Base Registers (likewise).
    4 KB (588 words) - 18:00, 12 January 2024
  • line1 : Connection from IP address 127.0.0.1 line 2: Connection from IP address 127.0.0.1
    64 KB (10,642 words) - 19:18, 1 February 2024
  • ...| H9400-LTN01 A1 B1 BASE MAT. WILL BE CHG'D FROM MINDEL | ...K001 - Fixed the "holes in memory" problem due to address bit 23 causing address parity problems. |
    233 KB (10,381 words) - 20:20, 22 May 2023

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