DMA20 Memory Bus Adapter

The DMA20 Memory Bus Adapter is an optional controller on KL10 CPUs which provides an old-style PDP-10 memory bus (termed an 'KBus' here), to allow existing PDP-10 core main memory to be used on one. (In a multi-processor system, each CPU has a separate DMA20, if configured to have one; the multi-port memory banks of PDP-10 memories will allow banks to be shared between CPUs.)

Implementation

The DMA20 is connected to the MBox of the KL10 via the SBus. Four separate KBuses are provided per CPU, to allow maximum (for the KL10) interleaving; the DMA20 can operate in 1-, 2- or 4-bus mode.

It consists of ten hex boards plugged into an I/O backplane (one shared with the DIA20 IBus Adapter‎) of the KL10; these are connected to memory bus connectors mounted lower down in that rack.

External links

• DMA20 Memory Bus Adapter Unit Description
• KL10-Based Physical Description - contains images of DMA20 backplanes and wiring, pp. 3-7-3-11; board configuration, pp. 3-27,3-28