TM11 magtape controller
The TM11, TMA11 and TMB11 magnetic tape controllers are a series of UNIBUS device controllers, used with a number of different 1/2" magnetic tape drives from DEC. They are all compatible, both in their interface to the drives, and in their programming interface.
The TM11 and TMA11 are almost identical in construction; they are implemented as a series of smaller standard FLIP CHIPs in a custom-wired 19" backplane.
The TMB11 is a re-implementation, using two larger custom boards - one hex (M7912) and one quad (M7911) - along with 4 generic (i.e. not device-unique) UNIBUS-specific FLIP CHIPs (M105, M795, M796, M7821); all of which plug into a custom hex-high four-slot system unit backplane (for a BA11, etc box), DEC part number 70-12678.
Contents
Configurations
The TM11 series controllers connect to a 'Master drive', which includes considerable extra electronics; additional 'Slave' drives may be connected to the Master drive.
Much of the extra functionality is related to the operation of the drive (CRC, etc); however, the TM11 series controllers generate a Positive bus, which a Master drive (depending on the drive type in use) converts to a Negative bus for the Slave drives - Slave drives of some types have a Negative bus only.
The TM11 series controllers were initially used with the TU10 magtape drives, for which the slaves are all Negative bus. Later, they were used with the TS03 drive (for which the Master drive includes an M8920 board, to interface to a TM11). They were also used with the TU10W drive (which is the later TU16 drive, without the TM02 controller); and the TE16 drive, when it is upgraded to TE10W (Positive bus - Master and Slave) or TE10N (Negative bus - Slave).
Device registers
Register | Abbreviation | Address |
---|---|---|
Status Register | MTS | 772520 |
Command Register | MTC | 772522 |
Byte Record Counter | MTBRC | 772524 |
Current Memory Address Register | MTCMA | 772526 |
Data Buffer | MTD | 772530 |
TU10 Read Lines | MTRD | 772532 |
772520: Status Register (MTS)
Illegal Command | EOF | CRE | PAE | BGL | EOT | RLE | BTE | NXM | SELR | BOT | 7CH | SDWN | WRL | RWS | TUR |
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
772522: Command Register (MTC)
ERR | DEN8-5 | PCLR | PEVN | Unit Select | CUR | INT ENB | Extended Memory | Function | GO | ||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
772524: Byte Record Counter (MTBRC)
BC15 <---> BC00 | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
772526: Current Memory Address Register (MTCMA)
MA15 <---> MA00 | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
772530: Data Buffer (MTD)
Data (read-only) | Data (read/write) | ||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
772532: TU10 Read Lines (MTRD)
Timer | CRC/LPCC selector | BTE error | Gap shutdown | Unused | Parity | Data | |||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
Drive bus
The connection to the master drive is a standard dual-width BC11-A cable, as used for the UNIBUS. This is the pinout for the TM11 (the other two are basically identical to this):
Pin | Signal Name |
Use | Source | Pin | Signal Name |
Use | Source |
---|---|---|---|---|---|---|---|
AA1 | SEL0 | Tape unit select | Controller | AA2 | |||
AB1 | SEL1 | AB2 | Ground | ||||
AC1 | SEL2 | AC2 | |||||
AD1 | AD2 | WD0 | Write Data | Controller | |||
AE1 | DEN0 | Density (see table below) |
Controller | AE2 | WD1 | ||
AF1 | DEN1 | AF2 | WD2 | ||||
AH1 | AH2 | WD3 | |||||
AJ1 | WXG | Write Extended Gap | Controller | AJ2 | WD4 | ||
AK1 | FWD | Tape Forward | AK2 | WD5 | |||
AL1 | RWD | Tape Rewind | AL2 | WD6 | |||
AM1 | WRE | Write Enable | AM2 | WD7 | |||
AN1 | Ground | AN2 | REV | Tape reverse | Controller | ||
AP1 | AP2 | CINIT | Initialize | ||||
AR1 | AR2 | SET | Required to start any tape operation | ||||
AS1 | AS2 | WDR | Write Data Ready | ||||
AT1 | AT2 | PEVN | Even Parity | ||||
AU1 | AU2 | WFMK | Write File Mark | ||||
AV1 | AV2 | Ground | |||||
BA1 | RDS | Read Strobe | Drive | BA2 | |||
BB1 | SDWN | Tape Settle Down | BB2 | Ground | |||
BC1 | TUR | Tape Unit Ready | BC2 | ||||
BD1 | Ground | BD2 | WRS | Write Strobe | Drive | ||
BE1 | BE2 | CRCS | CRC Strobe | ||||
BF1 | RD0 | Read Data | Drive | BF2 | RWS | Rewind Status | |
BH1 | RD1 | BH2 | |||||
BJ1 | RD2 | BJ2 | |||||
BK1 | RD3 | BK2 | BOT | Beginning of Tape | Drive | ||
BL1 | RD4 | BL2 | WRL | Write Lock | |||
BM1 | RD5 | BM2 | VPE | Vertical Parity Error | |||
BN1 | RD6 | BN2 | SELR | Select Remote | |||
BP1 | RD7 | BP2 | 7CH | 7-Track Unit | |||
BR1 | RDP | Read Parity Bit | Drive | BR2 | EOT | End of Tape | |
BS1 | FMK | File Mark Read | BS2 | CRCE | CRC Error | ||
BT1 | Ground | BT2 | LRCE | Longitudinal Parity Error | |||
BU1 | BU2 | LRCS | Longitudinal Parity Strobe | ||||
BV1 | MAN CLR L | BV2 | Ground |
For the TMA11 and TMB11, delete the "MAN CLR L", and re-name "DEN0" and "DEN1" to "DEN8" and "DEN5" respectively. The encoding of the two density bits is:
DEN 5 | DEN 8 | Mode |
---|---|---|
0 | 0 | 200 bpi, 7-channel |
0 | 1 | 800 bpi, 7-channel |
1 | 0 | 556 bpi, 7-channel |
1 | 1 | 800 bpi, 9-channel |
Module Count Table
The following table gives a listing of the FLIP CHIPs used in the TM11. (Drawn from module count charts, confirmed in module utilization drawings.)
Single height boards:
Type | Count | Function |
---|---|---|
G736 | 1 | Jumper Module |
M105 | 1 | UNIBUS Address Selector |
M111 | 5$ | Sixteen Inverters |
M112 | 3 | Ten 2-input NOR Gates |
M113 | 7$ | Ten 2-input NAND Gates |
M115 | 2 | Eight 3-input NAND Gates |
M117 | 1 | Six 4-input NAND Gates |
M121 | 2 | Six AND/NOR Gates |
M127 | 3 | Three 2-2-2-3 AND/NOR Gate |
M149 | 4 | Nine 2-input NAND Wired OR Matrix |
M163 | 1 | Dual Binary-to-Octal Decoder |
M203 | 1 | Eight S/R Flip-Flops |
M205 | 2 | Five D Flip-Flops |
M216 | 5 | Six D Flip-Flops |
M239 | 1 | Three 4-bit Counter Registers |
M304 | 2 | Four One-Shot Delays |
M307 | 1 | Two Integrating One-Shot |
M627 | 3 | Six NAND Power Amplifiers |
M688 | 1 | UNIBUS Power Fail Driver |
M7821 | 1 | UNIBUS Interrupt Control |
M784 | 1 | UNIBUS Receiver |
M785 | 1 | UNIBUS Transceiver |
M796 | 1 | UNIBUS Master Control |
M797 | 1 | Register Selection |
M798 | 1 | UNIBUS Drivers |
$ = The module count table in the TM11 manual gives a different number, but that manual seems to be wrong; the prints, and an actual unit, have the number given here.
Double height boards:
- M795 - Word Count and Current Memory Address
The table in the TM11 manual calls for two of these, but this is clearly wrong.
Module Locations
These are the module locations for the TM11:
Slot | Connector A | Connector B |
---|---|---|
5 | M111 | M627 |
6 | M111 | M901@ |
7 | M798 | G736 |
8 | M149 | M149 |
9 | M105 | M784 |
10 | M7821 | M785 |
11 | M796 | M797 |
12 | M795 | |
13 | M149 | M149 |
14 | M216 | M205 |
15 | M163 | M112 |
16 | M113 | M111 |
17 | M115 | M121 |
18 | M216 | M216 |
19 | M121 | M113 |
20 | M117 | M627 |
21 | M239 | M113 |
22 | M115 | M205 |
23 | M111 | M127 |
24 | M216 | M127 |
25 | M112 | M127 |
26 | M112 | M111 |
27 | M113 | M901@ |
28 | M203 | M688 |
29 | M113 | M113 |
30 | M304 | M627 |
31 | M307 | M216 |
32 | M304 | M113 |
@ = Cable
For the TMA11, slot 27B contains an M7854 "OPI/BTE Detector".
External links
- TM11 - documentation at BitSavers
- TM11 DECmagtape system (DEC-I1-HTMAA-D-D)
- TM11 DECmagtape Engineering Drawings
- TMA11 - documentation at BitSavers
- TMA11 DECmagtape system (EK-TMA11-TM-002)
- TMA11 engineering drawings
- TMB11 - documentation at BitSavers
- TMB11/TS03 DECmagtape system user's manual (EK-TMB11-OP-00I)
- TMB11 Field Maintenance Print Set (MP00078)
- TMB11/TU10W DECmagtape system maintenance manual (EK-TMBEF-MM-002)