Difference between revisions of "DRV11-J High-Density Parallel Interface"
Latest revision as of 04:29, 15 May 2020
The DRV11-J High-Density Parallel Interface was a QBUS device controller which provided four bi-directional 16-bit parallel ports. It was a dual format card (M8049). It used programmed I/O; the direction of each port was programmable. It was not program compatible with any other DEC parallel port controller.
Connection to the user's device was via a pair of 50-pin Berg connectors; PORTS A and B through the bottom connector (furthest from the insertion handles), ports C an D via the top. Data going out to the user's device was latched in the DRV11-J, so may be read at leisure; data coming in from the user's device was merely sampled by the DRV11-J, so must be held until it has been read.
The device had four pairs of control and buffer registers, which could be configured to any eight sequential word locations in the I/O page. The first DRV11-J was normally configured to addresses 764160-764176; the second to 764140-767756, the third to 764120-767736, and so on.
|Control and Status Register A||DRCSRA||764160|
|Data Buffer Register A||DRDBRA||764162|
|Control and Status Register B||DRCSRB||764164|
|Data Buffer Register B||DRDBRB||764166|
|Control and Status Register C||DRCSRC||764170|
|Data Buffer Register C||DRDBRC||764172|
|Control and Status Register D||DRCSRD||764174|
|Data Buffer Register D||DRDBRD||764176|