Difference between revisions of "DTE20 Ten-Eleven Interface"
From Computer History Wiki
m (→External links: +Eng drw) |
m (→External links: +KL10-Based Technical Manual) |
||
| (5 intermediate revisions by 2 users not shown) | |||
| Line 1: | Line 1: | ||
| − | The '''DTE20 Ten-Eleven Interface''' (also called the '''DTE20 Console Processor Interface''') is a [[peripheral]] on [[KL10]] [[Central Processing Unit|CPUs]] which allows a [[PDP-11]] to act as a [[front end]]. Depending on how the DTE20 is configured ('restricted' or 'privileged'), it can be just for off-loading [[input/output|I/O]] functionality to the PDP-11 (both to reduce the load on the main CPU, but also to allow access to the wide range of peripherals supported on the PDP-11) | + | The '''DTE20 Ten-Eleven Interface''' (also called the '''DTE20 Console Processor Interface''') is a [[peripheral]] on [[KL10]] [[Central Processing Unit|CPUs]] which allows a [[PDP-11]] to act as a [[front end]]. Depending on how the DTE20 is configured ('restricted' or 'privileged'), it can be just for off-loading [[input/output|I/O]] functionality to the PDP-11 (both to reduce the load on the main CPU, but also to allow access to the wide range of peripherals supported on the PDP-11); or it can also function as a control and [[diagnostic]] system for the main CPU: loading [[microcode]], [[bootstrap]]ping, etc. |
| − | The PDP-11 and KL10 are able to examine each other's [[main memory]] (limited on the KL10 side for restricted DTE20's), and [[interrupt]] each other. | + | The PDP-11 and KL10 are able to examine each other's [[main memory]] (in a limited way on the KL10 side, for restricted DTE20's), and [[interrupt]] each other. |
| − | A KL10 may have up to 4 DTE20's, and a PDP-11 may host up to 4 DTE20's on different | + | A KL10 may have up to 4 DTE20's, and a PDP-11 may host up to 4 DTE20's on different KL10's. |
==Implementation== | ==Implementation== | ||
| − | The DTE20 is connected to the EBox of the KL10 via the EBus; privileged DTE20's also have access to the KL10's | + | The DTE20 is connected to the EBox of the KL10 via the EBus; privileged DTE20's also have access to the diagnostic section of the KL10's Ebus. To the PDP-11, it appears as a normal [[UNIBUS]] peripheral. |
| − | A 'restricted' DTE20 consists of a pair of [[DEC card form factor|hex]] boards (M8552, | + | A 'restricted' DTE20 consists of a pair of [[DEC card form factor|hex]] boards (M8552, M8553) and a dual card (M8554), plugged into an I/O backplane of the KL10 (along with the [[RH20 MASSBUS controller|RH20s]]). These are connected to a [[UNIBUS]] connector mounted lower down in that rack, and a [[BC11A UNIBUS cable|BC11A]] cable from the PDP-11 (usually a [[PDP-11/40]]) plugs into that. |
==External links== | ==External links== | ||
| Line 15: | Line 15: | ||
* [http://www.bitsavers.org/pdf/dec/pdp10/KL10/EK-DTE20-UD-003_Oct76.pdf DTE20 Ten-Eleven Interface Unit Description] | * [http://www.bitsavers.org/pdf/dec/pdp10/KL10/EK-DTE20-UD-003_Oct76.pdf DTE20 Ten-Eleven Interface Unit Description] | ||
* [http://bitsavers.org/pdf/dec/pdp10/KL10/MP00301_KL10PV_Jun80.pdf KL10-PV Field Maintenance Print Set] - Contains DTE20 on pp. 403-461 | * [http://bitsavers.org/pdf/dec/pdp10/KL10/MP00301_KL10PV_Jun80.pdf KL10-PV Field Maintenance Print Set] - Contains DTE20 on pp. 403-461 | ||
| + | * [http://www.bitsavers.org/pdf/dec/pdp10/KL10/EK-OKL10-TM_KL10_TechRef_Aug84.pdf KL10-Based Technical Manual] (EK-OKL10-TM-002) - the DTE20 is covered on pp. 90-92 of the PDF; the EBUS is covered on pp. 81-86 | ||
| + | * [http://www.bitsavers.org/pdf/dec/pdp10/KL10/EK-1080U-SD-003_1080_1090_SysDescr_Jan77.pdf decsystem-1080/1090 System Description] (EK-1080U-SD-003) - the DTE20 is covered on pp. 75-76 of the PDF | ||
* [http://www.bitsavers.org/pdf/dec/pdp10/KL10/EK-108OU-PD-002_KL10-Based_Physical_Description_Mar77.pdf KL10-Based Physical Description] - contains images of DTE20 backplanes and wiring, pp. 3-7-3-11; board configuration, pp. 3-27,3-28 | * [http://www.bitsavers.org/pdf/dec/pdp10/KL10/EK-108OU-PD-002_KL10-Based_Physical_Description_Mar77.pdf KL10-Based Physical Description] - contains images of DTE20 backplanes and wiring, pp. 3-7-3-11; board configuration, pp. 3-27,3-28 | ||
| − | [[Category: PDP- | + | [[Category: PDP-10 Machine Interfaces]] |
| + | [[Category: UNIBUS Machine Interfaces]] | ||
Latest revision as of 13:14, 12 November 2023
The DTE20 Ten-Eleven Interface (also called the DTE20 Console Processor Interface) is a peripheral on KL10 CPUs which allows a PDP-11 to act as a front end. Depending on how the DTE20 is configured ('restricted' or 'privileged'), it can be just for off-loading I/O functionality to the PDP-11 (both to reduce the load on the main CPU, but also to allow access to the wide range of peripherals supported on the PDP-11); or it can also function as a control and diagnostic system for the main CPU: loading microcode, bootstrapping, etc.
The PDP-11 and KL10 are able to examine each other's main memory (in a limited way on the KL10 side, for restricted DTE20's), and interrupt each other.
A KL10 may have up to 4 DTE20's, and a PDP-11 may host up to 4 DTE20's on different KL10's.
Implementation
The DTE20 is connected to the EBox of the KL10 via the EBus; privileged DTE20's also have access to the diagnostic section of the KL10's Ebus. To the PDP-11, it appears as a normal UNIBUS peripheral.
A 'restricted' DTE20 consists of a pair of hex boards (M8552, M8553) and a dual card (M8554), plugged into an I/O backplane of the KL10 (along with the RH20s). These are connected to a UNIBUS connector mounted lower down in that rack, and a BC11A cable from the PDP-11 (usually a PDP-11/40) plugs into that.
External links
- DTE20 Ten-Eleven Interface Unit Description
- KL10-PV Field Maintenance Print Set - Contains DTE20 on pp. 403-461
- KL10-Based Technical Manual (EK-OKL10-TM-002) - the DTE20 is covered on pp. 90-92 of the PDF; the EBUS is covered on pp. 81-86
- decsystem-1080/1090 System Description (EK-1080U-SD-003) - the DTE20 is covered on pp. 75-76 of the PDF
- KL10-Based Physical Description - contains images of DTE20 backplanes and wiring, pp. 3-7-3-11; board configuration, pp. 3-27,3-28
