|Manufacturer:||Digital Equipment Corporation|
|Year Design Started:||December, 1969|
|Year First Shipped:||May, 1972|
|Word Size:||36 bits|
|Logic Type:||TTL ICs|
|Design Type:||clocked synchronous|
|Clock Speed:||1 μsec|
|Memory Speed:||1.0 μsec (fast), 1.8 μsec (slow)|
|Physical Address Size:||22 bits|
|Virtual Address Size:||18 bits|
|Memory Management:||paging, 512-word pages|
|Operating System:||TOPS-10, TENEX, TYMCOM-X|
|Price:||US$200K (CPU), US$500K-1M (system)|
It was the first PDP-10 model to provide paging in its as-shipped form, with 512-word pages. It was initially released in a single-CPU version (DECsystem-1060 and -1070); a two-CPU version (DECsystem-1077) was released later.
A few documents refer to the KI10-based system as PDP-10I.
Although the KI10 CPU provided two each memory bus and I/O bus connectors (Quick Latch connectors for the former), there is only one bus of each type; the two connectors are provided for physical cabling convenience (left and right of the CPU cabinet).