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The LSI-11 CPUs were DEC's first cost-reduced PDP-11 CPUs, using a microprocessor (the LSI-11 chip set). They also used a new bus, the QBUS.

They were the first PDP-11 models to not have a front panel to control them; instead, as a cost-reduction measure, the main serial line is used as a operating console, using the ODT functionality.

The first LSI-11 was a quad board (M7264) with additional functionality on-board. A later board, the LSI-11/2, packaged just the CPU on a dual card.


Note that ODT will not function correctly in the LSI-11s unless there is main memory on the QBUS. The reason for this restriction is unknown: the KDF11 CPUs and KDJ11 CPUs, which also use ODT, do not have this limitation; e.g. a system consisting only of a KDF11-A CPU and a serial console will run ODT.

Both LSI-11s are Q16 devices; they only drive 16 address lines. Although they can be plugged into a Q18 or Q22 backplane, they will only function with Q16 main memory. (With Q22 memory, the pins used for BDAL18-21 are used for other, internal signals by the LSI-11. The reason for the incompatability with Q18 memory is currently unknown.)


There were CPU options were available for the LSI-11s: the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS; the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS).

They also supported the optional KUV11 Writeable Control Store.