Difference between revisions of "MA780 Multiport Memory Option"

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The '''MA780 Multiport Memory Option''' was a [[Metal Oxide Semiconductor|MOS]] [[Dynamic RAM|DRAM]] [[multi-port memory]] [[main memory]] system for the [[VAX-11/780]]; it allowed creation of [[multi-processor]] systems such as the [[VAX-11/782]]. It was 64 [[bit]]s wide, to interface to the -11/780's [[Synchronous Backplane Interconnect]] (SBI), and provided [[error-correcting code|ECC]] (8 bits/double-[[word]]), which could correct all single-bit errors.
 
The '''MA780 Multiport Memory Option''' was a [[Metal Oxide Semiconductor|MOS]] [[Dynamic RAM|DRAM]] [[multi-port memory]] [[main memory]] system for the [[VAX-11/780]]; it allowed creation of [[multi-processor]] systems such as the [[VAX-11/782]]. It was 64 [[bit]]s wide, to interface to the -11/780's [[Synchronous Backplane Interconnect]] (SBI), and provided [[error-correcting code|ECC]] (8 bits/double-[[word]]), which could correct all single-bit errors.
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[[File:Huge_4_VAX-11-780_MA780_System.png|thumb|right|400px|Huge system made up of four VAX-11/780's connected to an MA780 Multiport Memory]]
  
 
An MA780 system was comprised of:
 
An MA780 system was comprised of:
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<!-- It was possible to [[interleaving|interleave]] two MA780's to improve performance. -->
 
<!-- It was possible to [[interleaving|interleave]] two MA780's to improve performance. -->
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==Implementation==
 
==Implementation==
  
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| 8 || M8210 || MAP || Memory Array
 
| 8 || M8210 || MAP || Memory Array
 
|-
 
|-
−
| 9 || M?? || MAP || Selective Map Cache (optional)
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| 9 || M8210 || MAP || Selective Map Cache (optional)
 
|-
 
|-
 
| 10 || M8261 || MPS || Multiport Port Synchronizer
 
| 10 || M8261 || MPS || Multiport Port Synchronizer

Latest revision as of 15:45, 7 April 2024

The MA780 Multiport Memory Option was a MOS DRAM multi-port memory main memory system for the VAX-11/780; it allowed creation of multi-processor systems such as the VAX-11/782. It was 64 bits wide, to interface to the -11/780's Synchronous Backplane Interconnect (SBI), and provided ECC (8 bits/double-word), which could correct all single-bit errors.

Huge system made up of four VAX-11/780's connected to an MA780 Multiport Memory

An MA780 system was comprised of:

  • the main MA780 unit, which contained a custom backplane holding i) a small group of control cards, and ii) a variable number of array cards (between 1 and 8 per MA780), holding the DRAM chips; and
  • in each connected CPU (between 2 and 4), an MA780-C Port Interface, held in another, smaller custom backplane, which connected the main MA780 unit (up to two different ones per MA780-C) to the host CPU's SBI.

With the 256-Kbyte M8210 array card (shared with the MS780-C), this allowed a maximum of 2MB per MA780. The -11/780 thus supported up to 2 MA780 subsystems, for a maximum of 4MB with fully populated MA780's.


Implementation

The main MA780 was implemented on super hex cards, mounted in a custom 20-slot backplane. The cards were:

Slot Board Acronym Function
1 M8210 MAY Memory Array (optional)
...
8 M8210 MAP Memory Array
9 M8210 MAP Selective Map Cache (optional)
10 M8261 MPS Multiport Port Synchronizer
11 M8212 MDT Memory Data Paths
12 M8260 MAT Multiport Array Timing
13 M8259 MPC Multiport Port Control (Port 3 - optional)
14 M9045   BDI Connect (rear)
15 M8259 MPC Multiport Port Control (Port 2 - optional)
16 M9045   BDI Connect (rear)
17 M8259 MPC Multiport Port Control (Port 1)
18 M9045   BDI Connect (rear)
19 M8259 MPC Multiport Port Control (Port 0)
20 M9045   BDI Connect (rear)

Slots 1-8 held 256-Kbyte M8210 array cards; a minimum of one, in slot 8, was required.

The MA780-C was mounted in a custom 20-slot backplane. The contents were:

Slot Board Acronym Function
1     Blank
2 M9040/M8258   SBI Terminator / Multiport Port Interface (optional)
3 M8258   Multiport Port Interface
4 M9045   BDI Connect (rear)

External links

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