DV11 Communications Multiplexer

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The DV11 Communications Multiplexer (also called the DV11 Synchrous Preprocessor) was a UNIBUS multi-line synchronous serial line interface. It supported up to 16 lines, and had a maximum aggregate throughput of 34K characters/second. It used a 'microprocessor' to drive the lines, using DMA to the PDP-11's main memory for both input and output.

For modem control, a single later style DM11-BB Modem Control Option‎ per DV11, mounted in the main DV11 backplane, along with the rest of the DV11 cards, was used. (The DM11-BB is logically a separate device, albeit one housed in the DH11.)


Register Abbreviation Address
System Control Register DVSCR 775000
Receiver Interrupt Character Register DVRICR 775002
Line Control Register DVLCR 775004
Secondary Register Selection Register DVSRSR 775006
Secondary Register Access Register DVSRAR 775010
Special Functions Register DVSFR 775012
NPR Status Register DVNSR 775014
Modem Control Status Register DVMCSR 775020
Modem Line Status Register DVMLSR 775022

The addresses shown are for the first DV11 in a system; additional units are normally set to be immediately following (0775040, 0775100, 0775140, etc).

The DV11 has a set of 16 'secondary' registers for each line, access to which is gained by placing the secondary register number and line number in the appropriate bits in the DVSRSR, and then reading/writing the DVSRAR. The secondary registers are:

Register Function
0 Transmitter Principal Current Address
1 Transmitter Principal Byte Count
2 Transmitter Alternate Current Address
3 Transmitter Alternate Byte Count
4 Receiver Current Address
5 Receiver Byte Count
6 Transmitter Accumulated Block Check
7 Receiver Accumulated Block Check
10 Transmitter Control Table Base Address
11 Receiver Control Table Base Address
12 Line Protocol Parameters
13 Line State
14 Transmitter Mode Bits
15 Receiver Mode Bits
16 Line Progress
17 Receiver Control Byte Storage

775000: System Control Register (DVSCR)

15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
  • NSI - NPR Status Interrupt
  • NSIE - NPR Status Interrupt Enable
  • SIE - Storage Interrupt Enable
  • MCLR - Master Clear
  • NSOI - NPR Status Overflow Interrupt
  • MAINT - Maintenance Enable
  • RIRC - Receiver Interrupt Response Completed
  • RI - Receiver Interrupt
  • RIE - Receiver Interrupt Enable
  • MEXT - Memory Extension
  • MU - Maintenance Use
  • MGO - Microprocessor Go

775006: Secondary Register Selection Register (DVSRSR)

Unused RSEL Unused LSEL
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
  • RSEL - Register Selection
  • LSEL - Line Selection


It was constructed from a custom 9-slot backplane double system unit (DEC part number 54-11420), into which were plugged a number of hex and quad boards, along with up to two DV11-BA distribution panels (H317-C). Four BC08R flat cables connect the main unit to each distribution panel (two for data and clock, two for modem control.).

Processing is performed by a 'microprocessor', but this not the kind of device now understood by that term; rather, it is a small custom processor controlled by microcode. It has 8 different 16-bit instructions (BRANCH A, BRANCH B, ALU OP, RAM OP, DATA XFR, NPR OP, SET/CLR OP, BCC OP), and an ALU built out of 74 series 74181 ALU chips.


The boards in the main unit are:

  • M7807 - Mux and Bus Control
  • M7808 - Mux and Modem Scan Control
  • M7836 - ALU and Transfer Bus
  • M7837 - UNIBUS Data and NPR Control
  • M7838 - ROM, RAM and Branch
  • M7839 - Sync Mux Line Card, 4 lines (up to four cards)

The M7836-M7839 are hex cards; the M7807 and M7808 are quad. (The M7807 and M7808 are shared with the DH11.)

Board locations (as seen from the board insertion side of the backplanes, not the wire-wrap pin side, as is common in DEC documentation) are:

Slot A B C D E F
1 UNIBUS In M7807
2 M7836
3 M7837
4 M7838
5 M7839
6 M7839
7 M7839
8 M7839
9 UNIBUS Out M7808

See also

External links