KW11-W Watchdog Timer

The KW11-W Watchdog Timer is a UNIBUS peripheral which monitors correct operation of a system; unless it is regularly updated by the system's software, it will force a high-priority interrupt.

Physically, the KW11-W was a dual card, the M7823, along with two standard single card FLIP CHIPs, an M105 Address Selector and an M7821 Interrupt Control; they all plugged into an SPC slot.

Registers

The programming interface is fairly simple; there are four registers, which can be configured to any four sequential word locations in the I/O page

Register	Abbreviation	Address
Watchdog Control and Status Register	WDCSR	772400
Clear Flags Register	WDCFR	772402
External Control and Status Register	WDECSR	772404
Switch Relay Register	WDSRR	772406

In the register contents (below), bits which are read/write or unused are shown in normal font, those which are read-only are in italics, and those which are write-only are in bold.

Control and Status Register (WDCSR)

SLP	RF	Unused					CRF	SC	EI	Unused				ET	ST
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

• SLP - Short Loop
• RF - Receive Flag
• CRF - Clear Receive Flag
• SC - Second Chance
• EI - Enable Interrupts
• ET - Enable Timer
• SR - Start Timer

External Control and Status Register (WDECSR)

ED15	Unused							ED7	Unused
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

• ED - External Device Status

Switch Relay Register (WDSRR)

Unused															EOR
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

• EOR - Energize Output Relay

Eternal links

• KW11-W engineering drawings