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  • 1 KB (166 words) - 00:32, 23 June 2020
  • ...-B Floating-Point Processor]] and [[KT11-C Memory Management Unit]] of the PDP-11/45 plugged into the CPU's [[backplane]]. ...e special high-speed [[MS11 Semiconductor Memory System]], specific to the PDP-11/45, which plugged into a special [[bus]], the Fastbus, which was also part
    3 KB (395 words) - 21:08, 2 July 2023
  • ...ocessing Unit|CPU]] is the later [[Central Processing Unit|CPU]] for the [[PDP-11/45]]; it differed from the earlier [[KB11-A CPU]] in that is used the [[syn ...e special high-speed [[MS11 Semiconductor Memory System]], specific to the PDP-11/45, which plugged into a special [[bus]], the Fastbus, which was also part
    2 KB (307 words) - 12:32, 11 October 2022
  • ...Memory Management]] architecture; in fact, the KT11-C is the archetype for PDP-11 memory management units. [[Category: PDP-11 UNIBUS Processors]]
    2 KB (231 words) - 02:38, 12 October 2022
  • ...tional [[PDP-11 Extended Instruction Set]] for the [[KD11-A CPU]] of the [[PDP-11/40]]; it implements multiply, divide, and multi-bit shift instructions. It [[Category: PDP-11 UNIBUS Processors]]
    2 KB (304 words) - 02:33, 12 October 2022
  • ...the [[hardware]] [[floating point]] option for the [[KD11-Z CPU]] of the [[PDP-11/44]]. It implements the full [[FP11 floating point]]; it consists of a sing [[Category: PDP-11 UNIBUS Processors]]
    961 bytes (149 words) - 02:20, 13 October 2022
  • ...the terminal letter code 'Z' was a tip to the fact that it was the last [[PDP-11]] CPU to be made out of discrete [[integrated circuit|chips]], and not a [[ Full [[PDP-11 Memory Management]] and a [[cache]] (the [[KK11-B Cache Memory|KK11-B]]) we
    4 KB (668 words) - 15:59, 6 February 2024
  • ...U]] is the earlier CPU for the [[PDP-11/70]]. It is heavily based on the [[PDP-11/45]]'s [[KB11-A CPU]]; the -11/70 is basically an -11/45 with a [[cache]], Full [[PDP-11 Memory Management]] and the cache were standard on all KB11-B's. It used a
    3 KB (456 words) - 21:08, 2 July 2023
  • The '''KB11-C''' [[Central Processing Unit|CPU]] is the later CPU for the [[PDP-11/70]]; it is basically the same as the earlier [[KB11-B CPU]], except that i '''''Note''''': ''The DEC documentation contains an error here. The "PDP-11/70 Maintenance and Installation Manual", EK-11070-MM-002, refers to the M81
    2 KB (260 words) - 21:03, 24 October 2022
  • ...oating point]] units of many [[PDP-11]]s); [[channel]]s are effectively co-processors which are specialized to doing [[input/output|I/O]].
    528 bytes (79 words) - 16:25, 15 December 2018
  • ...ircuit board|boards]] which use the [[F-11 chip set]]; it implements the [[PDP-11 Commercial Instruction Set]]. [[Category: PDP-11 Processors]]
    650 bytes (102 words) - 18:57, 30 May 2021
  • [[Category: PDP-11 Processors]]
    2 KB (383 words) - 02:31, 12 October 2022
  • ...[[PDP-11]]s. (No [[PDP-8 family|PDP-8]] or other [[List of Programmed Data Processors|early DEC system]] [[device controller]] has yet been seen for it, although
    2 KB (258 words) - 22:12, 14 August 2023
  • ...it|chip]] for [[LSI-11 chip set]] which adds support for a subset of the [[PDP-11 Commercial Instruction Set]], sometimes known as DIS ([[DIBOL]] instruction It also apparently includes the [[PDP-11 Extended Instruction Set]] (but not the [[FIS floating point|FIS]]).
    1 KB (241 words) - 21:11, 2 July 2023
  • ...grated circuit|chip]] for [[LSI-11 chip set]] which adds support for the [[PDP-11 Extended Instruction Set]], but not also [[FIS floating point]] (like the [ [[Category: PDP-11 Processors]]
    466 bytes (75 words) - 21:12, 2 July 2023
  • ...n any of the three uROM positions. The first two uROMs contain the basic [[PDP-11]] [[instruction set]]; the third uROM is optional, and a number of differen ...Commercial Instruction Set‎|KEV11-C]] provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]] (it also apparently includes the EIS, but
    5 KB (773 words) - 22:42, 20 December 2023
  • ...rd form factor|hex]] [[printed circuit board|card]] (the M7263), the first PDP-11 CPU to be built on a single card. ...ction Set|EIS]] [[instruction]]s, or the various instructions added to the PDP-11 [[instruction set]] (XOR, SOB, SXT and MARK).
    2 KB (385 words) - 22:37, 31 March 2022
  • ...1/40]] which provided [[memory management]]. It did not provide the full [[PDP-11 Memory Management]], but the simplified subset; in fact, the KT11-D is the ...ee e.g. EK-11040-TM-002, pg. 4-22) but this may just be an artifact of DEC PDP-11 software.
    2 KB (258 words) - 00:29, 30 December 2023
  • ...]] of the [[PDP-11/60]]. It provided the [[PDP-11 Memory Management|subset PDP-11 memory management]], and used a [[UNIBUS]] for its [[main memory]] access ( * [http://www.bitsavers.org/pdf/dec/pdp11/1160/ PDP-11/60] - BitSavers
    4 KB (536 words) - 12:34, 11 October 2022
  • ...ional [[hardware]] [[floating point]] unit for the [[KD11-K CPU]] of the [[PDP-11/60]]. The KD11-K provided the full [[FP11 floating point]] using [[microcod [[Category: PDP-11 UNIBUS Processors]]
    1 KB (229 words) - 02:19, 13 October 2022

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