Difference between revisions of "FP11-E Floating Point Processor"

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* [http://www.bitsavers.org/pdf/dec/pdp11/1160/MP-00429_FP11-E_Engineering_Drawings_Jun77.pdf FP11-E Field Maintenance Print Set] (MP00429)
 
* [http://www.bitsavers.org/pdf/dec/pdp11/1160/MP-00429_FP11-E_Engineering_Drawings_Jun77.pdf FP11-E Field Maintenance Print Set] (MP00429)
  
[[Category: PDP-11 Processors]]
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[[Category: PDP-11 UNIBUS Processors]]

Latest revision as of 02:19, 13 October 2022

The FP11-E Floating Point Processor is the optional hardware floating point unit for the KD11-K CPU of the PDP-11/60. The KD11-K provided the full FP11 floating point using microcode; the FP11-E was an option which provided considerably improved floating point performance.

It was a 4 hex board co-processor:

  • Floating Point Next Micro-Address (FNUA - M7878)
  • Floating Point Exponent (FLTEXP - M7879)
  • Multiplying Network (MULNET - M7880)
  • Floating Point ALU (FALU - M7881)

which mounted in slots 8-11 of the CPU's backplane. The main CPU can detect the presence of the FP11-E, and, if present, uses it to perform any floating point instructions found in the program.

Electrically, it connected directly to the CPU and is controlled by it; unidirectional data buses are provided to move information (including instructions) from the CPU to the FPP, and vice versa.

The FP11-E has its own microcode, 88 bits wide, to control its operation, and interaction with the main CPU.

Further reading

  • FP11-E floating-point processor technical manual (EK-FP11E-TM-001)

External links