Difference between revisions of "PDP-6"

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| memory speed = 5 μsec (inital), 2 μsec (later)
 
| memory speed = 5 μsec (inital), 2 μsec (later)
 
| memory mgmt = single base and bounds register pair
 
| memory mgmt = single base and bounds register pair
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| operating system = [[TOPS-10|Monitor]], [[ITS]], [[WAITS]], [[JOSS|JOSS II]]
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| operating system = [[TOPS-10|Monitor]], [[Incompatible Timesharing System|ITS]], [[WAITS]], [[JOSS|JOSS II]]
 
| predecessor = None
 
| predecessor = None
 
| successor = [[KA10]]
 
| successor = [[KA10]]
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[[Image:Tk-pdp6-cropped.jpeg|thumb|left|400px|The [[MIT_Artificial_Intelligence_Laboratory|MIT AI lab]] PDP-6 console]]
 
[[Image:Tk-pdp6-cropped.jpeg|thumb|left|400px|The [[MIT_Artificial_Intelligence_Laboratory|MIT AI lab]] PDP-6 console]]
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[[Image:PDP-6 mod top.jpg|thumb|left|250px|A System Module used in a [[PDP-6]]; this example has had its [[transistor]]s salvaged from it]]
  
 
The '''PDP-6''' was effectively the first model of the [[PDP-10]]; they are (mostly) [[object code]] compatible. It was built out of [[System Module]]s, [[DEC]]'s predecessor to the [[FLIP CHIP]] module series (out of which the first [[PDP-10]], the [[KA10]], was built).
 
The '''PDP-6''' was effectively the first model of the [[PDP-10]]; they are (mostly) [[object code]] compatible. It was built out of [[System Module]]s, [[DEC]]'s predecessor to the [[FLIP CHIP]] module series (out of which the first [[PDP-10]], the [[KA10]], was built).
  
 
It featured 36-[[bit]] [[word]]s, at the time effectively the standard for machines used for scientific computing. In a period when almost all [[program]]ming was done in [[assembly language]], it used those long words to provide a powerful and regular [[instruction set]].
 
It featured 36-[[bit]] [[word]]s, at the time effectively the standard for machines used for scientific computing. In a period when almost all [[program]]ming was done in [[assembly language]], it used those long words to provide a powerful and regular [[instruction set]].
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[[Image:PDP-6 mod top.jpg|thumb|left|250px|A System Module used in a [[PDP-6]]; this example has had its [[transistor]]s salvaged from it]]
 
  
 
The machine was not a success, commercially (only 23 were sold), in part because the hardware was unreliable - largely because of one type of large System Module, which contained one bit of the entire [[ALU]] section of the [[CPU]] - a 'bridge too far' at the then-current state of [[printed circuit board]] technology.
 
The machine was not a success, commercially (only 23 were sold), in part because the hardware was unreliable - largely because of one type of large System Module, which contained one bit of the entire [[ALU]] section of the [[CPU]] - a 'bridge too far' at the then-current state of [[printed circuit board]] technology.
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{{semi-stub}}
 
{{semi-stub}}
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<br clear="left">
  
 
==External links==
 
==External links==
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* [https://github.com/aap/pdp6 Simulator based on processor schematics]
 
* [https://github.com/aap/pdp6 Simulator based on processor schematics]
 
* [https://gordonbell.azurewebsites.net/Digital/A_Computer_that_grows_BusWeek_640314.pdf A computer that grows with you] - Business Week article on the PDP-6
 
* [https://gordonbell.azurewebsites.net/Digital/A_Computer_that_grows_BusWeek_640314.pdf A computer that grows with you] - Business Week article on the PDP-6
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* [http://its.pdp10.se/pdp6-timeline/ Photo timeline of the MIT AI lab PDP-6]
  
  
 
[[Category: DEC Systems]]
 
[[Category: DEC Systems]]
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[[Category: 36-bit Computers]]

Latest revision as of 07:28, 6 September 2023


PDP-6
Manufacturer: Digital Equipment Corporation
Architecture: PDP-10
Year Design Started: March, 1963
Year First Shipped: June, 1964
Year Discontinued: 1965
Form Factor: small mainframe
Word Size: 36 bits
Logic Type: germanium and silicon transistors
Design Type: asynchronous with hardware subroutines
Instruction Speed: 4 μsec (approximately - different instructions take different amounts of time; the CPU is not synchronous)
Memory Speed: 5 μsec (inital), 2 μsec (later)
Physical Address Size: 18 bits
Virtual Address Size: 18 bits
Memory Management: single base and bounds register pair
Operating System: Monitor, ITS, WAITS, JOSS II
Predecessor(s): None
Successor(s): KA10
Price: US$120K (CPU), US$300K (system)


The MIT AI lab PDP-6 console
A System Module used in a PDP-6; this example has had its transistors salvaged from it

The PDP-6 was effectively the first model of the PDP-10; they are (mostly) object code compatible. It was built out of System Modules, DEC's predecessor to the FLIP CHIP module series (out of which the first PDP-10, the KA10, was built).

It featured 36-bit words, at the time effectively the standard for machines used for scientific computing. In a period when almost all programming was done in assembly language, it used those long words to provide a powerful and regular instruction set.

The machine was not a success, commercially (only 23 were sold), in part because the hardware was unreliable - largely because of one type of large System Module, which contained one bit of the entire ALU section of the CPU - a 'bridge too far' at the then-current state of printed circuit board technology.

According to Tim Anderson, the Project MAC group Dynamic Modeling/Computer Graphics took delivery of the very last PDP-6 from a previous owner. They adopted the AI Lab's ITS operating system, but shortly after moved onto a PDP-10.


External links

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