PDP-6

From Computer History Wiki
Revision as of 22:56, 5 August 2017 by Jnc (talk | contribs) (Add info box)
Jump to: navigation, search


PDP-6
Manufacturer: Digital Equipment Corporation
Architecture: PDP-10
Year Design Started: March, 1963
Year First Shipped: June, 1964
Year Discontinued: 1965
Form Factor: mainframe
Word Size: 36 bits
Logic Type: germanium and silicon transistors
Design Type: asynchronous with hardware subroutines
Clock Speed: 4 μsec
Memory Speed: 5 μsec (inital), 2 μsec (later)
Physical Address Size: 18 bits
Virtual Address Size: 18 bits
Memory Management: single base and bounds register pair
Operating System: Monitor, ITS
Predecessor(s): None
Successor(s): KA10
Price: US$120K (CPU), US$300K (system)


The PDP-6 was effectively the first model of the PDP-10; they are (mostly) binary-code compatible. It was built out of System Modules, DEC's predecessor to the FLIP CHIP module series (out of which the first PDP-10, the KA10, was built).

The machine was not a success, commercially (only 23 were sold), in part because the hardware was unreliable (largely because of one type of large System Module, which contained one bit of the entire ALU section of the CPU - a 'bridge too far' at the then-current state of printed circuit board technology).

External links