Difference between revisions of "MS11-M MOS memory"
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It is a [[DEC card form factor|hex-height]] card; the MS11-MB holds 256 Kbytes when fully populated with 16Kx1 DRAM [[integrated circuit|chips]]; the half-populated MS11-MA contains 128 Kbytes. | It is a [[DEC card form factor|hex-height]] card; the MS11-MB holds 256 Kbytes when fully populated with 16Kx1 DRAM [[integrated circuit|chips]]; the half-populated MS11-MA contains 128 Kbytes. | ||
| − | The [[access time]] is 490 nsec (typical; | + | The [[access time]] is 490-525 nsec (typical/max; 620-675 nsec extra on [[refresh]] conflict), and the [[cycle time]] is 950-1000 nsec (write cycle; refresh conflict additional as above). Refresh time is 620 nsec (typical; 675 nsec maximum); the time for a complete refresh pass is 12.5 μsec (typical), or 13.75 μsec (maximum). |
It has [[Error-correcting code|ECC]] which automagically corrects single-[[bit]] errors, (at a 70 nsec penalty in [[access time|response time]] when an error occurs) and detects double-bit errors. The memory is arranged as 4 banks, each 32 data bits wide, with 7 additional bits for the ECC. | It has [[Error-correcting code|ECC]] which automagically corrects single-[[bit]] errors, (at a 70 nsec penalty in [[access time|response time]] when an error occurs) and detects double-bit errors. The memory is arranged as 4 banks, each 32 data bits wide, with 7 additional bits for the ECC. | ||
Revision as of 01:26, 17 October 2018
The MS11-M (M8722) is a DRAM main memory card; it can be configured as either UNIBUS memory, or Extended UNIBUS.
When configured for UNIBUS use, it is plugged into an MUD backplane slot. Note: The MS11-M uses power voltages of +12V/-12V, unlike the normal +15V/-15V supplied by an MUD slot. In general, the MS11-M thus cannot actually be plugged into most MUD backplanes.
When configured as an EUB card, it can only be plugged into the EUB slots on the PDP-11/24 or PDP-11/44 backplanes (both of which provide the correct voltages).
It is a hex-height card; the MS11-MB holds 256 Kbytes when fully populated with 16Kx1 DRAM chips; the half-populated MS11-MA contains 128 Kbytes.
The access time is 490-525 nsec (typical/max; 620-675 nsec extra on refresh conflict), and the cycle time is 950-1000 nsec (write cycle; refresh conflict additional as above). Refresh time is 620 nsec (typical; 675 nsec maximum); the time for a complete refresh pass is 12.5 μsec (typical), or 13.75 μsec (maximum).
It has ECC which automagically corrects single-bit errors, (at a 70 nsec penalty in response time when an error occurs) and detects double-bit errors. The memory is arranged as 4 banks, each 32 data bits wide, with 7 additional bits for the ECC.
On power-on, the system is frozen (via negation of the ACLO UNIBUS signal) for up to 451 msec while the entire memory is cleared, to prevent spurious ECC errors. For diagnostic purposes, the ECC can be disabled, and there are also means for the CPU to read/write the ECC bits directly.
The board has provision to use battery backup power to retain data during a power outage. Configuration is by DIP switches.
