Difference between revisions of "KD11-A CPU"
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The [[Berg connector]]s on the M7232 carry the microcode bus to the KE11-E EIS card; note also the metal handle on this card, even though it is only a quad card; it and the KE11-F FIS card are the only non-[[QBUS]] quad cards with such a handle. | The [[Berg connector]]s on the M7232 carry the microcode bus to the KE11-E EIS card; note also the metal handle on this card, even though it is only a quad card; it and the KE11-F FIS card are the only non-[[QBUS]] quad cards with such a handle. | ||
− | All of them plugged into a [[wire-wrap]]ped custom [[backplane]] dual [[system unit]]. The KE11-E Extended Instruction Set, KE11-F Floating Instruction Set, and KT11-D Memory Management option cards all plugged into pre-wired slots in this backplane, as did the KJ11-A Stack Limit Register and the KW11-L Line Time Clock. | + | All of them plugged into a [[wire-wrap]]ped custom 9-slot [[backplane]] dual [[system unit]]. The optional KE11-E Extended Instruction Set, KE11-F Floating Instruction Set, and KT11-D Memory Management option cards all plugged into pre-wired slots in this backplane, as did the KJ11-A Stack Limit Register and the KW11-L Line Time Clock. This left one unused slot, which was wired as a UNIBUS [[Small Peripheral Controller|SPC]] slot; that slot also contained the 'UNIBUS out'. |
+ | |||
+ | Board locations are: | ||
+ | <!-- (as seen from the board insertion side of the backplane, not the wire-wrap pin side, as is common in [[Digital Equipment Corporation|DEC]] documentation) --> | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! !! colspan="6" | Connector | ||
+ | |- | ||
+ | ! Slot !! A !! B !! C !! D !! E !! F | ||
+ | |-|| style="text-align:center;" | KM11-A (KT, KE) | ||
+ | | 1 || colspan="4" style="text-align:center;" | M7239 FIS || style="text-align:center;" | KM11-A (KT, KE) || style="text-align:center;" | KM11-A (KD) | ||
+ | |- | ||
+ | | 2 || colspan="6" style="text-align:center;" | M7238 EIS | ||
+ | |- | ||
+ | | 3 || colspan="4" style="text-align:center;" | M7232 u Word || style="text-align:center;" | KJ11-A || style="text-align:center;" | KW11-L | ||
+ | |- | ||
+ | | 4 || colspan="6" style="text-align:center;" | M7231 Data Path | ||
+ | |- | ||
+ | | 5 || colspan="6" style="text-align:center;" | M7233 IR Decode | ||
+ | |- | ||
+ | | 6 || colspan="6" style="text-align:center;" | M7235 Status | ||
+ | |- | ||
+ | | 7 || colspan="6" style="text-align:center;" | M7234 Timing | ||
+ | |- | ||
+ | | 8 || colspan="6" style="text-align:center;" | M7236 KT11-D | ||
+ | |- | ||
+ | | 9 || colspan="2" style="text-align:center;" | UNIBUS Out || colspan="4" style="text-align:center;" | SPC | ||
+ | |} | ||
==External links== | ==External links== |
Revision as of 17:17, 31 March 2020
The KD11-A PDP-11 CPU for the PDP-11/35 and PDP-11/40 was a multi-board micro-programmed processor.
Support for the EIS was optional, with the KE11-E Extended Instruction Set, a hex card. There was also optional floating point hardware, the KE11-F Floating Instruction Set, a quad card; it was not the full FP11 Floating Point, but the minimal FIS floating point.
Memory management support was also optional, with the KT11-D Memory Management, another hex card; it too was not the full PDP-11 Memory Management, but the simplified subset.
Other CPU options included the KJ11-A Stack Limit Register, and the KW11-L Line Time Clock (the latter being a standard option across a number of PDP-11 CPUs).
Implementation
The basic KD11-A was contained on four hex cards:
- M7231 - Data Paths
- M7233 - IR Decode
- M7234 - Timing
- M7235 - Status
and one quad card:
- M7232 - μword
The Berg connectors on the M7232 carry the microcode bus to the KE11-E EIS card; note also the metal handle on this card, even though it is only a quad card; it and the KE11-F FIS card are the only non-QBUS quad cards with such a handle.
All of them plugged into a wire-wrapped custom 9-slot backplane dual system unit. The optional KE11-E Extended Instruction Set, KE11-F Floating Instruction Set, and KT11-D Memory Management option cards all plugged into pre-wired slots in this backplane, as did the KJ11-A Stack Limit Register and the KW11-L Line Time Clock. This left one unused slot, which was wired as a UNIBUS SPC slot; that slot also contained the 'UNIBUS out'.
Board locations are:
Connector | ||||||
---|---|---|---|---|---|---|
Slot | A | B | C | D | E | F |
1 | M7239 FIS | KM11-A (KT, KE) | KM11-A (KD) | |||
2 | M7238 EIS | |||||
3 | M7232 u Word | KJ11-A | KW11-L | |||
4 | M7231 Data Path | |||||
5 | M7233 IR Decode | |||||
6 | M7235 Status | |||||
7 | M7234 Timing | |||||
8 | M7236 KT11-D | |||||
9 | UNIBUS Out | SPC |
External links
- What Makes A PDP-11/35 Tick? - List of chips in the KD11-A