Difference between revisions of "CPU/Memory Interconnect"
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The primary functions of the CMI are to do priority arbitration for use of the bus, and carry data between the sub-systems, as well as carrying [[interrupt]]s. It is also used for a variety of lesser functions, such as [[diagnostic]]s, loading writeable [[microcode]], etc. | The primary functions of the CMI are to do priority arbitration for use of the bus, and carry data between the sub-systems, as well as carrying [[interrupt]]s. It is also used for a variety of lesser functions, such as [[diagnostic]]s, loading writeable [[microcode]], etc. | ||
| − | The CMI is carried over a [[backplane]], into which the various sub-systems plug | + | The CMI is carried over a [[backplane]], into which the various sub-systems plug. It is [[synchronous]] and interlocked (like the [[Synchronous Backplane Interconnect|SBI]] of the [[VAX-11/780]]); at the [[analog]] level, it is [[tri-state]]. |
==Details== | ==Details== | ||
Revision as of 02:48, 2 June 2022
The CPU/Memory Interconnect (often given as CMI) is the main bus which connects the main sub-systems (such as the CPU and main memory, as well as I/O adapters) in the VAX-11/750 processor. A sub-system connected to the CMI is referred to as a 'nexus'.
The primary functions of the CMI are to do priority arbitration for use of the bus, and carry data between the sub-systems, as well as carrying interrupts. It is also used for a variety of lesser functions, such as diagnostics, loading writeable microcode, etc.
The CMI is carried over a backplane, into which the various sub-systems plug. It is synchronous and interlocked (like the SBI of the VAX-11/780); at the analog level, it is tri-state.
Details
The CMI consists of 45 bi-directional lines: priority arbitration, address, data, control, and status. A uni-directional clock signal line is used to synchronize the operations on the CMI. At any given point in time, one nexus is the 'master', and another (selected by it) is the 'slave' in each CMI interaction.
Arbitration is fully distributed; each nexus has a priority arbitration line which it can assert, and on each cycle, each requesting nexus looks to see if it is the highest-priority nexus for that cycle.
CMI units
The CMI units present in every /750 are:
Optional units include:
- RH750 Massbus Adapter
- DW750 Second Unibus Interface
- CI750 Computer Interconnect Interface
- DR750 Parallel Interface
External links
- VAX Hardware Handbook Volume 1 - the CMI is covered in Chapter 9 (pp. 316-321 of the PDF)
