Difference between revisions of "KJ11-A Stack Limit Register"
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* [http://www.bitsavers.org/pdf/dec/pdp11/1140/PDP-1140_System_Engr_Drawings_Rev_P_Jun74.pdf PDP-11/40 system engineering drawings] (pp. 109-113 of the PDF) | * [http://www.bitsavers.org/pdf/dec/pdp11/1140/PDP-1140_System_Engr_Drawings_Rev_P_Jun74.pdf PDP-11/40 system engineering drawings] (pp. 109-113 of the PDF) | ||
| − | [[Category: PDP-11 Processors]] | + | [[Category: PDP-11 UNIBUS Processors]] |
Latest revision as of 01:35, 12 October 2022
The KJ11-A Stack Limit Register is option for the KD11-A CPU of the PDP-11/40. The basic KD11-A implements stack limit functionality, but at a fixed address (0400); installing the KJ11-A allows the address boundary to be set in a CPU register.
Physically, the KJ11-A is an extended-length single-height board (M7237), which plugs into a dedicated slot in the CPU's backplane.
External links
- KD11-A processor manual (DEC-11-HKDAA-A-D) - Section 7.2 "KJ11-A Stack Limit Register"; pp. 7-3 - 7-11 (pp. 213-221 of the PDF)
- PDP-11/40 system engineering drawings (pp. 109-113 of the PDF)
