Difference between revisions of "Rubin 10-11 interface"
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| − | The '''Rubin 10-11 interface''' was a shared [[main memory]] interface used to connect the [[ | + | The '''Rubin 10-11 interface''' was a shared [[main memory]] interface used to connect to up to eight [[PDP-11]]s (technically, 8 machines with a [[UNIBUS]]; several of the attached machines were not -11's) to a [[PDP-10 Memory Bus]]. It gave the [[KA10]]'s [[Central Processing Unit|CPU]] read/write access ([[interrupt]]s were not supported) to everything on the connected UNIBI. As far as is known, the other machine(s) did not have access to the KA10's memory (unlike with the [[DL10 PDP-11 Data Link|DL10]] and [[DTE20 Ten-Eleven Interface|DTE20]], similar devices). |
| − | This table was compiled from various sources: source code for STUFF, IOELEV, etc. | + | ==Technical details== |
| + | |||
| + | The [[address space]] provided by the Rubin interface on the PDP-10 memory bus was one [[PDP-10]] [[moby]]; that was divided into 255 [[page]]s of 1K [[word]]s each (the standard [[Incompatible Timesharing System|ITS]] page size). (The 256th page contained the mapping registers, below; unusually for a PDP-10 device, access to its [[register]]s was via the PDP-10 memory bus.) Each Rubin interface page could be independently directed to a window in the selected UNIBUS' address space, controlled by the page's mapping register: | ||
| + | |||
| + | {| class="wikitable" | ||
| + | ! Field !! Width !! Function | ||
| + | |- | ||
| + | | Valid || 1 | ||
| + | |- | ||
| + | | Write enable || 1 | ||
| + | |- | ||
| + | | Unused || 5 | ||
| + | |- | ||
| + | | Machine || 3 || Selected machine/UNIBUS | ||
| + | |- | ||
| + | | Relocation || 16 || Base address on UNIBUS | ||
| + | |- | ||
| + | | Protection || 10 || Size of this window | ||
| + | |} | ||
| + | |||
| + | (The documentation, such as it is, does not explicitly say that any particular alignment of the window on the UNIBUS side was necessary; the [[data path]] for the [[address]] must have contained an [[adder]].) | ||
| + | |||
| + | A read cycle read two PDP-11 words; write cycles could write one or two words (selectable). | ||
| + | |||
| + | ==Machines== | ||
| + | |||
| + | The following machines were attached to the MIT-AI ITS KA10 via the Rubin interface. (This table was compiled from various sources: source code for STUFF, IOELEV, etc.) | ||
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| − | {{stub}} | + | {{semi-stub}} |
==External links== | ==External links== | ||
* [https://github.com/PDP-10/its-vault/blob/master/files/mini/10-11.info 10-11 INFO] - brief programming description for it | * [https://github.com/PDP-10/its-vault/blob/master/files/mini/10-11.info 10-11 INFO] - brief programming description for it | ||
| + | * [https://github.com/PDP-10/its-vault/tree/master/files/ten11 TEN11;] - ''probably'' the [[Stanford University Design System|SUDS]] drawings for it | ||
| + | * [https://github.com/PDP-10/its-vault/tree/master/files/ten11n TEN11N;] - "the new Ten-11 drawings" | ||
[[Category: PDP-10 Machine Interfaces]] | [[Category: PDP-10 Machine Interfaces]] | ||
[[Category: UNIBUS Machine Interfaces]] | [[Category: UNIBUS Machine Interfaces]] | ||
Latest revision as of 16:01, 22 March 2024
The Rubin 10-11 interface was a shared main memory interface used to connect to up to eight PDP-11s (technically, 8 machines with a UNIBUS; several of the attached machines were not -11's) to a PDP-10 Memory Bus. It gave the KA10's CPU read/write access (interrupts were not supported) to everything on the connected UNIBI. As far as is known, the other machine(s) did not have access to the KA10's memory (unlike with the DL10 and DTE20, similar devices).
Technical details
The address space provided by the Rubin interface on the PDP-10 memory bus was one PDP-10 moby; that was divided into 255 pages of 1K words each (the standard ITS page size). (The 256th page contained the mapping registers, below; unusually for a PDP-10 device, access to its registers was via the PDP-10 memory bus.) Each Rubin interface page could be independently directed to a window in the selected UNIBUS' address space, controlled by the page's mapping register:
| Field | Width | Function |
|---|---|---|
| Valid | 1 | |
| Write enable | 1 | |
| Unused | 5 | |
| Machine | 3 | Selected machine/UNIBUS |
| Relocation | 16 | Base address on UNIBUS |
| Protection | 10 | Size of this window |
(The documentation, such as it is, does not explicitly say that any particular alignment of the window on the UNIBUS side was necessary; the data path for the address must have contained an adder.)
A read cycle read two PDP-11 words; write cycles could write one or two words (selectable).
Machines
The following machines were attached to the MIT-AI ITS KA10 via the Rubin interface. (This table was compiled from various sources: source code for STUFF, IOELEV, etc.)
| Unibus | Name | Machine | Description |
| 0 | TV | PDP-11/10 | Knight TV |
| 1 | XGP | PDP-11/20 | Xerox Graphics Printer |
| 2 | LISP | CONS, GT40 | LISP machine |
| 3 | CHESS | CHEOPS | Hardware chess accelerator |
| 4 | LOGO | PDP-11/45 | Logo, SITS |
| 5 | ROBOT | PDP-11/45 | Micro Automation |
| 6 | VISION | PDP-11/40 | Computer vision |
| 7 | CHAOS | PDP-11/10 | Chaosnet front end |
External links
- 10-11 INFO - brief programming description for it
- TEN11; - probably the SUDS drawings for it
- TEN11N; - "the new Ten-11 drawings"
