Difference between revisions of "DJ11 Asynchronous 16-Line Multiplexer"
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− | The '''DJ11 | + | The '''DJ11 Asynchronous 16-Line Multiplexer''' is a [[UNIBUS]] [[peripheral]] which provides up to 16 [[asynchronous serial line]]s. Both input and output used [[programmed I/O]] (with separate receive and transmit [[interrupt]]s). On input, a 64-character [[First-In First-Out buffer|FIFO buffer]] made over-runs unlikely. [[Modem]]s were not supported. |
− | It was less flexible than, and not as efficient as, the roughly contemporaneous [[DH11 asynchronous serial line interface|DH11]]. | + | It was less flexible than, and not as efficient as, the roughly contemporaneous [[DH11 asynchronous serial line interface|DH11]]. It was effectively replaced by the [[DZ11 asynchronous serial line interface|DZ11]], which was cheaper (it was a single [[DEC card form factor|hex]] [[printed circuit board|board]]), and more flexible. |
− | It was effectively replaced by the [[DZ11 asynchronous serial line interface|DZ11]], which was cheaper (it was a single [[DEC card form factor|hex]] [[ | ||
− | The DJ11 allowed support of either all [[20mA current loop serial line interface|20mA]] or all [[EIA RS-232 serial line interface|EIA RS-232]] serial lines, by means of a dual-width level converter board. The parameters for each | + | The DJ11 allowed support of either all [[20mA current loop serial line interface|20mA]] or all [[EIA RS-232 serial line interface|EIA RS-232]] serial lines, by means of a dual-width level converter board. The versions of the DJ11 were: |
+ | |||
+ | * DJ11-AA - EIA level conversion | ||
+ | * DJ11-AB - No level conversion ([[transistor-transistor logic|TTL]] levels) | ||
+ | * DJ11-AC - EIA level conversion | ||
+ | |||
+ | The parameters for each group of four lines: | ||
− | |||
* character length (5-8 bits) | * character length (5-8 bits) | ||
− | * stop bits (1 | + | * stop bits (1 and 2) |
* parity (odd, even, none) | * parity (odd, even, none) | ||
− | could only be set with [[jumper]]s | + | could only be set with a pair of [[DIP switch]]es. A group of [[jumper]]s allowed configuration of separate input and output baud rates (75 to 9600) for each group. |
+ | |||
+ | A 'break' condition on the line (i.e. continuous assertion) could also be generated and detected. | ||
+ | |||
+ | ==Device registers== | ||
− | == | + | {| border=1 |
+ | ! Register !! Abbreviation !! Address | ||
+ | |- | ||
+ | |Control and Status [[Register]] || DJCSR || 760010 | ||
+ | |- | ||
+ | |Receive Buffer Register || DJRBUF || 760012 | ||
+ | |- | ||
+ | |Transmit Control Register || DJTCR || 760014 | ||
+ | |- | ||
+ | |Transmit Buffer Register || DJTBUF || 760016 | ||
+ | |- | ||
+ | |Break Control and Status Register || DJBCSR || 760014 | ||
+ | |} | ||
+ | |||
+ | ===760010: Control and Status Register (DJCSR)=== | ||
+ | {{16bit-header}} | ||
+ | | TRDY || TIE || FFO || SEN || Unused || RWBR || Unused || MTSE || DONE || RIE || Unused || BCLR || MCLR || MAINT || HDSEL || REN | ||
+ | {{16bit-bitout}} | ||
+ | |||
+ | ===760012: Receive Buffer Register (DJRBUF)=== | ||
+ | {{16bit-header}} | ||
+ | | CHPR || ORUN || FRERR || PERR || colspan=4 style="text-align:center;" | Line || colspan=8 style="text-align:center;" | Received Char | ||
+ | {{16bit-bitout}} | ||
− | + | ===760014: Transmit Control Register (DJTCR)=== | |
+ | {{16bit-header}} | ||
+ | | colspan=16 | CHL15 <---> CHL00 | ||
+ | {{16bit-bitout}} | ||
− | === | + | ===760016: Transmit Buffer Register (DJTBUF)=== |
+ | {{16bit-header}} | ||
+ | | colspan=4 style="text-align:center;" | Unused || colspan=4 style="text-align:center;" | Line || colspan=8 style="text-align:center;" | Transmitted Char | ||
+ | {{16bit-bitout}} | ||
− | + | ===760014: Break Control and Status Register (DJBCSR)=== | |
+ | {{16bit-header}} | ||
+ | | colspan=16 | BKL15 <---> BKL00 | ||
+ | {{16bit-bitout}} | ||
− | + | To read/write the BCSR register, bit 10 of the CSR is set. | |
− | |||
− | |||
− | == | + | ==Implementation== |
− | The | + | The implementation took a single custom [[system unit]] [[backplane]], containing multiple cards: |
* M7285 - Mux control (hex) | * M7285 - Mux control (hex) | ||
− | * M7279 - Receive silo | + | * M7279 - Receive silo |
− | * M7280 (2) - | + | * M7280 (2) - Octal [[Asynchronous serial line#UART|UARTs]] (quad) |
− | * [[M7821]] - Interrupt control | + | * [[M782 Interrupt Control|M7821]] - Interrupt control |
− | * [[M105]] - Address selection | + | * [[M105 Address Selector|M105]] - Address selection |
+ | |||
+ | (The M7280 as also used by the DH11.) The M7285 is a hex board (so the DJ11 could not be installed in a [[BA11-C Mounting Box|BA11-C]] or [[BA11-E Mounting Box]]); the others are dual and quad. | ||
The -AA, -AB and -AC versions of the DJ11 also included one: | The -AA, -AB and -AC versions of the DJ11 also included one: | ||
Line 42: | Line 81: | ||
respectively, which occupied a dual slot. | respectively, which occupied a dual slot. | ||
+ | |||
+ | Board locations (as seen from the board insertion side of the backplane, not the [[wire-wrap]] pin side, as is common in [[DEC]] documentation) are: | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! !! colspan="6" | Connector | ||
+ | |- | ||
+ | ! Slot !! A !! B !! C !! D !! E !! F | ||
+ | |- | ||
+ | | 1 || colspan="2" style="text-align:center;" | UNIBUS In || M105 || M7821 || colspan="2" style="text-align:center;" | M7279 Receive Silo | ||
+ | |- | ||
+ | | 2 || colspan="6" style="text-align:center;" | M7285 Mux Control | ||
+ | |- | ||
+ | | 3 || || || colspan="4" style="text-align:center;" | M7280 Octal UART | ||
+ | |- | ||
+ | | 4 || colspan="2" style="text-align:center;" | UNIBUS Out || colspan="4" style="text-align:center;" | M7280 Octal UART | ||
+ | |} | ||
+ | |||
+ | The unit is powered via a [[DEC power distribution connectors|standard 9-pin connector]]. | ||
===Distribution panels=== | ===Distribution panels=== | ||
− | The rack-mounted passive distribution panel used in the -AA EIA version was the H317-B distribution panel, which mounted directly into a standard 19" rack, and contained 16 DB-25P connectors. It was connected to the DJ11 with a pair of BC08S cables, which carried the 'main' signals (data, etc - i.e. non-modem control). | + | The rack-mounted passive distribution panel used in the -AA EIA version was the H317-B distribution panel (the same as used by the DH11), which mounted directly into a standard 19" rack, and contained 16 DB-25P connectors. It was connected to the DJ11 with a pair of BC08S cables, which carried the 'main' signals (data, etc - i.e. non-modem control). |
The -AC used an H317-A distribution panel, which had screw connectors. | The -AC used an H317-A distribution panel, which had screw connectors. | ||
− | [[Category: UNIBUS Serial Interfaces]] | + | ==Further reading== |
+ | |||
+ | * ''DJ11 Multiplexer User's Manual'' (EK-0DJ11-OP) - not online | ||
+ | * ''DJ11 Asynchronous Multiplexer Engineering Drawings'' - not online | ||
+ | |||
+ | ==External links== | ||
+ | |||
+ | * [http://www.bitsavers.org/pdf/dec/unibus/EK-DJ11-MM-003_DJ11_Maint_Man_Aug76.pdf DJ11 asynchronous 16-line multiplexer maintenance manual] (EK-DJ11-MM-003) | ||
+ | |||
+ | [[Category: UNIBUS Asynchronous Serial Interfaces]] |
Latest revision as of 10:36, 18 February 2023
The DJ11 Asynchronous 16-Line Multiplexer is a UNIBUS peripheral which provides up to 16 asynchronous serial lines. Both input and output used programmed I/O (with separate receive and transmit interrupts). On input, a 64-character FIFO buffer made over-runs unlikely. Modems were not supported.
It was less flexible than, and not as efficient as, the roughly contemporaneous DH11. It was effectively replaced by the DZ11, which was cheaper (it was a single hex board), and more flexible.
The DJ11 allowed support of either all 20mA or all EIA RS-232 serial lines, by means of a dual-width level converter board. The versions of the DJ11 were:
- DJ11-AA - EIA level conversion
- DJ11-AB - No level conversion (TTL levels)
- DJ11-AC - EIA level conversion
The parameters for each group of four lines:
- character length (5-8 bits)
- stop bits (1 and 2)
- parity (odd, even, none)
could only be set with a pair of DIP switches. A group of jumpers allowed configuration of separate input and output baud rates (75 to 9600) for each group.
A 'break' condition on the line (i.e. continuous assertion) could also be generated and detected.
Device registers
Register | Abbreviation | Address |
---|---|---|
Control and Status Register | DJCSR | 760010 |
Receive Buffer Register | DJRBUF | 760012 |
Transmit Control Register | DJTCR | 760014 |
Transmit Buffer Register | DJTBUF | 760016 |
Break Control and Status Register | DJBCSR | 760014 |
760010: Control and Status Register (DJCSR)
TRDY | TIE | FFO | SEN | Unused | RWBR | Unused | MTSE | DONE | RIE | Unused | BCLR | MCLR | MAINT | HDSEL | REN |
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
760012: Receive Buffer Register (DJRBUF)
CHPR | ORUN | FRERR | PERR | Line | Received Char | ||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
760014: Transmit Control Register (DJTCR)
CHL15 <---> CHL00 | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
760016: Transmit Buffer Register (DJTBUF)
Unused | Line | Transmitted Char | |||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
760014: Break Control and Status Register (DJBCSR)
BKL15 <---> BKL00 | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
To read/write the BCSR register, bit 10 of the CSR is set.
Implementation
The implementation took a single custom system unit backplane, containing multiple cards:
- M7285 - Mux control (hex)
- M7279 - Receive silo
- M7280 (2) - Octal UARTs (quad)
- M7821 - Interrupt control
- M105 - Address selection
(The M7280 as also used by the DH11.) The M7285 is a hex board (so the DJ11 could not be installed in a BA11-C or BA11-E Mounting Box); the others are dual and quad.
The -AA, -AB and -AC versions of the DJ11 also included one:
- M5901 EIA conversion module
- M5900 TTL 'conversion' module
- M5902 20mA conversion module
respectively, which occupied a dual slot.
Board locations (as seen from the board insertion side of the backplane, not the wire-wrap pin side, as is common in DEC documentation) are:
Connector | ||||||
---|---|---|---|---|---|---|
Slot | A | B | C | D | E | F |
1 | UNIBUS In | M105 | M7821 | M7279 Receive Silo | ||
2 | M7285 Mux Control | |||||
3 | M7280 Octal UART | |||||
4 | UNIBUS Out | M7280 Octal UART |
The unit is powered via a standard 9-pin connector.
Distribution panels
The rack-mounted passive distribution panel used in the -AA EIA version was the H317-B distribution panel (the same as used by the DH11), which mounted directly into a standard 19" rack, and contained 16 DB-25P connectors. It was connected to the DJ11 with a pair of BC08S cables, which carried the 'main' signals (data, etc - i.e. non-modem control).
The -AC used an H317-A distribution panel, which had screw connectors.
Further reading
- DJ11 Multiplexer User's Manual (EK-0DJ11-OP) - not online
- DJ11 Asynchronous Multiplexer Engineering Drawings - not online
External links
- DJ11 asynchronous 16-line multiplexer maintenance manual (EK-DJ11-MM-003)