Difference between revisions of "TC08 DECtape Controller"
From Computer History Wiki
(Covers the basics) |
m (+New cat) |
||
(One intermediate revision by the same user not shown) | |||
Line 11: | Line 11: | ||
[[Category: PDP-8 Storage Controllers]] | [[Category: PDP-8 Storage Controllers]] | ||
+ | [[Category: DECtape]] |
Latest revision as of 13:36, 30 May 2022
The TC08 DECtape Controller is a DECtape device controller for early PDP-8s such as the PDP-8/I and PDP-8/L. There are two variants; the TC08 is for machines which use the 'positive I/O bus'; a variant model, the TC08N, is for PDP8's with a 'negative I/O bus'. It is a DMA interface, using three cycle data break; it generates interrupts when operations are completed. It is implemented as two custom dual backplanes holding FLIP CHIPs. It is intended for use with either the TU55 DECtape Transport or the TU56 DECtape Transport.