Difference between revisions of "PDP-9"
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{{Infobox Machine | {{Infobox Machine | ||
| name = PDP-9 | | name = PDP-9 | ||
| + | | image = CIPG-PDP9.png | ||
| + | | imgwidth = 200px | ||
| + | | caption = PDP-9 at MIT Cognitive Information Processing Group | ||
| manufacturer = [[Digital Equipment Corporation]] | | manufacturer = [[Digital Equipment Corporation]] | ||
| year first shipped = 1966 | | year first shipped = 1966 | ||
| Line 8: | Line 11: | ||
| virtual address = 13 bits (direct), 15 bits (extended) | | virtual address = 13 bits (direct), 15 bits (extended) | ||
| logic type = PNP [[Transistor]] [[FLIP CHIP]]s | | logic type = PNP [[Transistor]] [[FLIP CHIP]]s | ||
| − | | design type = | + | | design type = [[microcode]]d |
<!-- | clock speed = μsec (basic instructions) --> | <!-- | clock speed = μsec (basic instructions) --> | ||
| − | | memory speed = 1 μsec | + | | memory speed = 1 μsec (9) or 1.5 μsec (9/L) |
| memory mgmt = bounds register | | memory mgmt = bounds register | ||
<!-- | operating system = --> | <!-- | operating system = --> | ||
| Line 17: | Line 20: | ||
| price = US$30K (8KW system) | | price = US$30K (8KW system) | ||
}} | }} | ||
| + | The '''PDP-9''' was [[Digital Equipment Corporation|DEC]]'s fourth 18-bit computer, and the first DEC [[Central Processing Unit|CPU]] to use [[microcode]]. A little over 400 were built. It was basically a re-implementation of the [[PDP-7]] (built out of [[System Module]]s) in [[FLIP CHIP]]s; the PDP-9 'Basic Software System' manual indicates that most PDP-7 software will run, un-modified. | ||
| − | + | Its principal intended use was for [[real-time system]]s, including data recording and process control. A variety of models were offered; the basic system provided 8K words of [[main memory]], and the PDP-9/L was a cost-reduced system with cheaper peripherals and 4KW of memory. | |
| − | + | ==Internals== | |
| − | It was a [[load-store architecture]], with a single [[accumulator]]. [[Instruction]]s had a 4-bit opcode, 1 bit of indirect, and 13 bits of address. Opcodes 000-060 were memory-reference instructions; for non-memory operations ('074' opcode), and [[input/output|I/O]] ('070'), bits in the 'address' field were used to specify details. '064' opcodes were for the optional [[Extended Arithmetic Element|EAE]]. | + | It was a [[load-store architecture]], with a single [[accumulator]]. [[Instruction]]s had a 4-bit [[operation code|opcode]], 1 bit of indirect, and 13 bits of [[address]]. Opcodes 000-060 were memory-reference instructions; for non-memory operations ('074' opcode), and [[input/output|I/O]] ('070'), bits in the 'address' field were used to specify details. '064' opcodes were for the optional [[Extended Arithmetic Element|EAE]]. |
| − | For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address', the | + | For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used read-only hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address' (CMA), the address of the next one; there was no micro-[[Program Counter|PC]]. Conditional micro-branching was available by modifying the CMA during that microinstruction. Some [[front panel]] functions (START, EXAMINE/DEPOSIT (NEXT), and READ IN) are implemented with microcode. According to a comment in the PDP-11 FAQ from Bernd Ullman, "''the first intention was to build a horizontally programmed machine but this was dropped because of the resulting word length needed for the control-words. So some(most ?) of the control signals were encoded and this led to a typical diagonally microprogrammed machine I think.''" |
| − | Multiply/divide was a hardware option, the KE09A EAE, which also performed shifting | + | Multiply/divide was a hardware option, the KE09A EAE, which also performed shifting; it was installed in pre-wired slots in the CPU's [[backplane]]. Use of more than 8KW of main memory (all core in the PDP-9) required the Memory Extension Control, KG09A, which provided [[bank switching]]. A [[memory management]] option, the KX09A, was also available; it included a [[register]] to set the boundary between protected and un-protected memory, and two modes for the CPU. |
The KF09A Automatic Priority Interrupt option provided 8 levels of [[interrupt]] priority, each of which could support up to 8 [[peripheral|devices]]. Each device could provide its own [[interrupt vector]]. The DM09 [[Direct Memory Access]] Channel Multiplexor Adapter provided high-speed devices with direct access to main memory for data transfers. | The KF09A Automatic Priority Interrupt option provided 8 levels of [[interrupt]] priority, each of which could support up to 8 [[peripheral|devices]]. Each device could provide its own [[interrupt vector]]. The DM09 [[Direct Memory Access]] Channel Multiplexor Adapter provided high-speed devices with direct access to main memory for data transfers. | ||
| Line 32: | Line 36: | ||
A large range of [[peripheral]]s were available, including [[DECtape]] (via the TC02 controller), [[magnetic tape]] (via the TC59), [[drum]] (RM09 controller) and [[fixed-head disk]] (RB09; and RS09, via the RF09 controller). The RM09 and RB09 use the DM09. | A large range of [[peripheral]]s were available, including [[DECtape]] (via the TC02 controller), [[magnetic tape]] (via the TC59), [[drum]] (RM09 controller) and [[fixed-head disk]] (RB09; and RS09, via the RF09 controller). The RM09 and RB09 use the DM09. | ||
| − | + | {{semi-stub}} | |
==See also== | ==See also== | ||
| Line 45: | Line 49: | ||
==External links== | ==External links== | ||
| − | * [http://www.bitsavers.org/pdf/dec/pdp9/ PDP-9] - | + | * [http://www.bitsavers.org/pdf/dec/pdp9/ PDP-9] - documentation at [[BitSavers]]; has manuals for KE09, KG09, KX09, KF09, etc |
** [http://www.bitsavers.org/pdf/dec/pdp9/PDP-9_UsersManual.pdf PDP-9 User Handbook] | ** [http://www.bitsavers.org/pdf/dec/pdp9/PDP-9_UsersManual.pdf PDP-9 User Handbook] | ||
** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-68.pdf TC02 DECtape Transport Control Instruction Manual] | ** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-68.pdf TC02 DECtape Transport Control Instruction Manual] | ||
** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-69.pdf TC02 DECtape Control Maintenance Manual] | ** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-69.pdf TC02 DECtape Control Maintenance Manual] | ||
* [https://bitsavers.org/pdf/dartmouth/theses/Blean_-_The_PDP-9_Mini_Time-Sharing_System_197206.pdf Dartmouth PDP-9 Mini Time-Sharing System] | * [https://bitsavers.org/pdf/dartmouth/theses/Blean_-_The_PDP-9_Mini_Time-Sharing_System_197206.pdf Dartmouth PDP-9 Mini Time-Sharing System] | ||
| − | + | * [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9 DEC PDP-9 System Number 319] - the RICM's PDP-9 - has lots of good images of the interior | |
| − | + | ** [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration DEC PDP-9 Restoration] - the start of a long saga - 2012-17 | |
| + | ** [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2019 PDP-9 Restoration Blog Starting 2019] | ||
| + | ** [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2020 PDP-9 Restoration Blog Starting 2020] | ||
| + | ** [https://sites.google.com/a/ricomputermuseum.org/home/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2021 PDP-9 Restoration Blog Starting 2021] | ||
| + | ** [https://sites.google.com/a/ricomputermuseum.org/home/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2022 PDP-9 Restoration Blog 2022] | ||
| + | ** [https://sites.google.com/a/ricomputermuseum.org/home/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2023 PDP-9 Restoration Blog 2023] | ||
| + | * [https://www.pdp-9.net/start-page Digital Equipment Corp. PDP-9] - another PDP-9 | ||
| + | ** [https://www.pdp-9.net/restoration-blog/the-rescue The rescue] | ||
{{Nav DEC}} | {{Nav DEC}} | ||
Latest revision as of 21:14, 9 February 2024
| PDP-9 | |
 PDP-9 at MIT Cognitive Information Processing Group | |
| Manufacturer: | Digital Equipment Corporation |
|---|---|
| Year First Shipped: | 1966 |
| Form Factor: | minicomputer |
| Word Size: | 18 bits |
| Logic Type: | PNP Transistor FLIP CHIPs |
| Design Type: | microcoded |
| Memory Speed: | 1 μsec (9) or 1.5 μsec (9/L) |
| Physical Address Size: | 15 bits (32K words) |
| Virtual Address Size: | 13 bits (direct), 15 bits (extended) |
| Memory Management: | bounds register |
| Predecessor(s): | PDP-7 |
| Successor(s): | PDP-15 |
| Price: | US$30K (8KW system) |
The PDP-9 was DEC's fourth 18-bit computer, and the first DEC CPU to use microcode. A little over 400 were built. It was basically a re-implementation of the PDP-7 (built out of System Modules) in FLIP CHIPs; the PDP-9 'Basic Software System' manual indicates that most PDP-7 software will run, un-modified.
Its principal intended use was for real-time systems, including data recording and process control. A variety of models were offered; the basic system provided 8K words of main memory, and the PDP-9/L was a cost-reduced system with cheaper peripherals and 4KW of memory.
Internals
It was a load-store architecture, with a single accumulator. Instructions had a 4-bit opcode, 1 bit of indirect, and 13 bits of address. Opcodes 000-060 were memory-reference instructions; for non-memory operations ('074' opcode), and I/O ('070'), bits in the 'address' field were used to specify details. '064' opcodes were for the optional EAE.
For the high-speed ROM needed for a microcoded design, it used read-only hard-wired core memory, similar to that in the Apollo Guidance Computer. Microinstructions were 36 bits wide, of which 6 were the 'control memory address' (CMA), the address of the next one; there was no micro-PC. Conditional micro-branching was available by modifying the CMA during that microinstruction. Some front panel functions (START, EXAMINE/DEPOSIT (NEXT), and READ IN) are implemented with microcode. According to a comment in the PDP-11 FAQ from Bernd Ullman, "the first intention was to build a horizontally programmed machine but this was dropped because of the resulting word length needed for the control-words. So some(most ?) of the control signals were encoded and this led to a typical diagonally microprogrammed machine I think."
Multiply/divide was a hardware option, the KE09A EAE, which also performed shifting; it was installed in pre-wired slots in the CPU's backplane. Use of more than 8KW of main memory (all core in the PDP-9) required the Memory Extension Control, KG09A, which provided bank switching. A memory management option, the KX09A, was also available; it included a register to set the boundary between protected and un-protected memory, and two modes for the CPU.
The KF09A Automatic Priority Interrupt option provided 8 levels of interrupt priority, each of which could support up to 8 devices. Each device could provide its own interrupt vector. The DM09 Direct Memory Access Channel Multiplexor Adapter provided high-speed devices with direct access to main memory for data transfers.
A large range of peripherals were available, including DECtape (via the TC02 controller), magnetic tape (via the TC59), drum (RM09 controller) and fixed-head disk (RB09; and RS09, via the RF09 controller). The RM09 and RB09 use the DM09.
See also
External links
- PDP-9 - documentation at BitSavers; has manuals for KE09, KG09, KX09, KF09, etc
- Dartmouth PDP-9 Mini Time-Sharing System
- DEC PDP-9 System Number 319 - the RICM's PDP-9 - has lots of good images of the interior
- Digital Equipment Corp. PDP-9 - another PDP-9
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