Difference between revisions of "KTJ11-B UNIBUS adapter"

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(Move backplane details to separate backplane page; cover DMA cache)
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[[Image:KTJ11-B.jpg|300px|thumb|right|KTJ11-B board]]
 
[[Image:KTJ11-B.jpg|300px|thumb|right|KTJ11-B board]]
  
The '''KTJ11-B UNIBUS adaptor''' is used with the [[KDJ11-B CPU|KDJ11-B]] and [[KDJ11-E CPU|KDJ11-E]] [[QBUS]] [[Central Processing Unit|CPU]] cards in the special [[KDJ11 PMI/UNIBUS backplane]] to add [[UNIBUS]] capability to systems built around those cards, the [[PDP-11/84]] and [[PDP-11/94]] systems respectively. It converts the native [[Private Memory Interconnect]] (PMI) [[bus]] supported by these  
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The '''KTJ11-B UNIBUS adaptor''' is used with the [[KDJ11-B CPU|KDJ11-B]] and [[KDJ11-E CPU|KDJ11-E]] [[QBUS]] [[Central Processing Unit|CPU]] cards in the special [[KDJ11 PMI/UNIBUS backplane]] to add [[UNIBUS]] capability to systems built around those cards; the [[PDP-11/84]] and [[PDP-11/94]] systems respectively. It converts the native [[Private Memory Interconnect]] (PMI) [[bus]] supported by these CPUs to the [[Digital Equipment Corporation|DEC]]-standard UNIBUS.
  
 
It is a [[DEC card form factor|hex-height]] board ('''M8191'''), and can only plug into the special [[backplane]], unique to those systems, which is wired to support it.  
 
It is a [[DEC card form factor|hex-height]] board ('''M8191'''), and can only plug into the special [[backplane]], unique to those systems, which is wired to support it.  

Latest revision as of 01:07, 8 October 2024

KTJ11-B board

The KTJ11-B UNIBUS adaptor is used with the KDJ11-B and KDJ11-E QBUS CPU cards in the special KDJ11 PMI/UNIBUS backplane to add UNIBUS capability to systems built around those cards; the PDP-11/84 and PDP-11/94 systems respectively. It converts the native Private Memory Interconnect (PMI) bus supported by these CPUs to the DEC-standard UNIBUS.

It is a hex-height board (M8191), and can only plug into the special backplane, unique to those systems, which is wired to support it.

Technical details

The KTJ11-B contains a [cache]], to increase the efficiency of DMA transfers on the UNIBUS; generally, two DMA red cycles on the UNIBUS result in a single PMI bus read operation. The cache contains 32 word-width entries, arranged into 4 independent 8-word sets; the KTJ11-B can thus handle 4 simultaneous DMA operations on the UNIBUS efficiently.

External links