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• TROPIX Manual
  processing of devices already supported. ........ (and other data from computer) ............
  91 KB (12,020 words) - 17:55, 13 August 2019
• Operating system
  ...mple, operating systems provided [[file system]]s for users to store their data in. ...r could not interfere with another user, so protection of users (and their data, stored on disk) from each other became another function of the operating s
  4 KB (608 words) - 15:04, 9 September 2022
• VT100
  ...the VT100 into [[VT52]] mode (one of the VT series' features) because VT52 processing had less overhead.[1] ...and use every other measure to improve how fast the terminal could process data (see above).
  4 KB (664 words) - 14:34, 11 August 2023
• Intel 80386
  ...r '''i386''' for short) is the 4th generation [[microprocessor]] [[Central Processing Unit|CPU]] from [[Intel]] based on the 8088/8086 CPU. The 386 was a 32-bit ...could only address 16MB of RAM maximum. The 386SX also only could transfer data 16 bits at a time, so reading a 32-bit word took two reads. This basically
  2 KB (372 words) - 01:23, 30 December 2021
• J-11 chip set
  ...ls. It was implemented in two [[integrated circuit|chips]] ('Control' and 'Data') carried on a single 60-pin [[Dual Inline Package|DIP]] carrier. ...full [[PDP-11 Memory Management]] architecture (with split Instruction and Data address space support, as well as Supervisor mode). Although it contains bu
  2 KB (242 words) - 23:19, 29 February 2024
• Intel 4004
  ...-only memory|ROM]], [[Random Access Memory|RAM]] was only used for storing data, and this complicated the life of the [[programmer]] somewhat. ...by the Wxx instructions. (Also, the CM-RAM[0123] lines from the [[Central Processing Unit|processor]] chip are used to control "4002 RAM chips".)
  5 KB (796 words) - 16:01, 14 July 2023
• IBM AT
  ...y Standard Architecture|ISA]] slots, and the 'advanced' [[i286]] [[Central Processing Unit|CPU]]. The IBM AT unlike the [[IBM XT]] is fully 16 bit, with a 16-bit [[data bus]], 24-bit [[address bus]], and 16-bit ISA expansion bus. IBM had also
  2 KB (396 words) - 00:41, 20 October 2018
• COBOL
  ...arily found in [[mainframe]] environments, and is used in business [[batch processing]]. * data
  3 KB (392 words) - 18:34, 14 January 2024
• MSV11-J memory module
  ...-JC versions), it is really intended for use with a PMI-capable [[Central Processing Unit|CPU]], such as the [[KDJ11-B CPU|KDJ11-B]]. In systems such as the [[P The memory is arranged as 2 banks, each 16 data bits wide, with 6 additional bits for the ECC. One bank is used to hold [[w
  8 KB (1,374 words) - 00:43, 30 July 2023
• KA630 CPU
  {{InfoboxVAXCPU-Data The '''KA630''' is the [[Central Processing Unit|CPU]] used in [[Digital Equipment Corporation|DEC]]'s [[MicroVAX II]].
  2 KB (174 words) - 06:15, 28 June 2022
• Starlink
  ...anticipated flood of data in digital form which would be generated by new data acquisition techniques. In April 1978, SRC set up a Panel on Astronomical Image and Data Processing under the chairmanship of Professor Mike Disney to ascertain the computing
  1 KB (194 words) - 01:54, 20 December 2018
• Intel 8086
  ...16-bit CPU, which means the internal [[data bus]], along with the external data bus. ...hile it retained the same addressing modes, and instructions, the external data bus was 8 bits wide. The 8088 was the primary CPU found in the [[IBM 5150|
  1 KB (210 words) - 13:29, 3 November 2018
• Intel 80186
  ...tral Processing Unit|CPU]]. It also exists in an 80188 variant (with 8-bit data bus, like the [[Intel 8088]]).
  975 bytes (146 words) - 13:32, 3 November 2018
• Real Programmers Don't Use Pascal
  Real Programmers do List Processing in FORTRAN. ...ming language with all sorts of complications. The worst thing about fancy data types is that you have to declare them, and Real Programming Languages, as
  22 KB (3,770 words) - 14:23, 25 August 2021
• Linux 0.00
  # The third is the system of data # Register all of the data, all point system, gdt Table 3
  14 KB (1,991 words) - 01:23, 20 December 2018
• DZ11 asynchronous serial line interface
  ...grammed I/O]], and thus could present a considerable load on the [[Central Processing Unit|CPU]] when running a high speed line, using [[interrupt]]s. A 64-entry |Transmit Data Register || TDR || 760106
  5 KB (730 words) - 02:26, 19 February 2023
• Installing NetBSD 5.0.2 on the SIMH MicroVAX II
  # Based on the maketape.c program and the maketape.data data file. i: Text Processing Tools No
  8 KB (1,125 words) - 02:02, 18 November 2010
• NetBSD 0.9 announcement
  add delay loop to lpa and lpt drivers to allow data port fixed bug in ECHONL processing (andrew)
  29 KB (4,794 words) - 18:15, 16 December 2018
• DLV11-E asynchronous serial line interface
  ...ters for the receive side (one Control and Status Register - CSR - and one data [[buffer]] register), and similarly, two for the transmit side. Each line h ...64-6), and 060 is the base vector. It can be set to [[halt]] the [[Central Processing Unit|CPU]], or [[bootstrap|re-boot]] the system, when a '[[asynchronous ser
  3 KB (489 words) - 01:18, 17 February 2023
• DLV11-J asynchronous serial line interface
  ...r]]s for the receive side (one Control and Status Register - CSR - and one data [[buffer]] register), and similarly, two for the transmit side. Each line h That line can be set to [[halt]] the [[Central Processing Unit|CPU]], or [[bootstrap|re-boot]] the system, when a '[[asynchronous ser
  4 KB (684 words) - 01:20, 17 February 2023

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