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• Cache
  ...a larger collection of data, implemented in such a way that access to the data copy in the cache is faster than to that in the large, full store. ...d disk blocks are kept in main memory, and network caches, where copies of data read from the network are kept on the local machine's disk.
  1 KB (251 words) - 00:58, 17 May 2023
• NORD-TSS
  ...ing the summer holidays of 1971, Bo Lewendal (system programmer at [[Norsk Data]]) implemented the initial version. It was further developed throughout 197 * Has a [[batch processing]] system
  1 KB (181 words) - 15:15, 9 September 2022
• VAXstation II
  {{InfoboxVAX-Data ...de); and the QBUS only for its [[input/output|I/O]] [[bus]]. Its [[Central Processing Unit|CPU]] was the [[MicroVAX II]]; the [[VCB01 Video Controller]] provided
  2 KB (254 words) - 16:59, 15 January 2024
• VAX 6000 Model 400
  {{InfoboxVAX-Data ...ange member of the [[VAX 6000 series]] line, the first to provide [[vector processing]].
  2 KB (153 words) - 18:26, 20 May 2024
• VAX 8300
  {{InfoboxVAX-Data The '''VAX 8200''' is a mid-range [[VAX]] dual-[[Central Processing Unit|CPU]] [[multi-processor]] system built around the [[VAX Bus Interconne
  2 KB (287 words) - 14:43, 19 May 2024
• VAX 8350
  {{InfoboxVAX-Data ...s an improved version of the [[VAX 8300]] mid-range [[VAX]] dual-[[Central Processing Unit|CPU]] [[multi-processor]] system, built around the [[VAX Bus Interconn
  2 KB (248 words) - 14:49, 19 May 2024
• VAX 8700
  {{InfoboxVAX-Data The '''VAX 8700''' is a single-[[Central Processing Unit|CPU]] version of the [[VAX 8800]].
  2 KB (192 words) - 00:28, 21 May 2024
• VAX 8800
  {{InfoboxVAX-Data The '''VAX 8800''' is a dual-[[Central Processing Unit|CPU]] version of the [[VAX 8700]].
  2 KB (237 words) - 00:30, 21 May 2024
• VAX 88x0
  {{InfoboxVAX-Data ...computer models, the difference between them being the number of [[Central Processing Unit|CPUs]] installed in the basic cabinet:
  2 KB (206 words) - 00:24, 21 May 2024
• VAXstation 3520/3540
  {{InfoboxVAX-Data ...around a unique [[bus]], the [[M-bus]], to which is attached the [[Central Processing Unit|CPU]], [[main memory]], a [[graphics]] adaptor, and an [[input/output|
  3 KB (298 words) - 06:49, 17 April 2024
• VAXstation 3200/3500
  {{InfoboxVAX-Data ...]] bus. (The [[address space]] of the [[QBUS]] was limited to 4MB, and the data section is only 16 bits wide.)
  2 KB (297 words) - 15:59, 23 May 2024
• Relocatable binary
  ...code|binary]] [[instruction]]s and data 'understood' by a given [[Central Processing Unit|CPU]]. These modules, which can be easily modified to operate at any [ In addition to the instructions (in binary form) and data, a relocatable binary module contains other information, needed for the lin
  1 KB (154 words) - 22:16, 9 October 2022
• Binary
  ...level of essentially all computers. It can also refer to numbers or other data stored in this form. ...e low-level form of a computer program which the hardware in the [[Central Processing Unit|CPU]] can interpret directly.
  407 bytes (64 words) - 18:23, 16 December 2018
• Secondary storage
  ...on it was not directly accessible to the [[Central Processing Unit|CPU]]; data in secondary storage generally had to be brought into main memory through a ...tape]], etc; these often were a bridge to prior non-electronic information-processing technologies (e.g. paper tape was used in [[teletype]]s).
  946 bytes (152 words) - 19:04, 3 May 2023
• Complex Instruction Set Computer
  ...r''' (usually abbreviated to '''CISC''') is one from a school of [[Central Processing Unit|CPU]] [[architecture]] which was the default approach until the rise o ...t generation were performance limited by the speed at which they could get data and instructions from memory; and they were also often had limited address
  2 KB (245 words) - 02:44, 3 September 2019
• Architecture
  ...(both those visible to the [[programmer]], and internal registers); the [[data path]]s which connect them all together; and the control system (usually [[
  3 KB (488 words) - 00:30, 23 October 2023
• Stack
  ...rage which is used to temporarily hold data in a 'push-down' fashion; i.e. data can be '''pushed''' onto the stack, and then '''popped''' off of it (in the Modern [[Central Processing Unit|CPU]]s generally dedicate one [[register]] to be a [[stack pointer]],
  931 bytes (164 words) - 16:20, 15 December 2018
• Honeywell 6000 series
  ...he same: a [[tightly-coupled]] [[multi-processor]], with all the [[Central Processing Unit|CPUs]] sharing access to a collection of [[multi-port memory]] units. '''Note:''' ''The data below is generally sourced from Honeywell documentation, including marketin
  12 KB (1,837 words) - 19:24, 3 January 2024
• Instruction set
  ...to the repertoire of [[instruction]]s provided by any particular [[Central Processing Unit|CPU]] [[architecture]]. ...nstructions to be able to use a [[stack]] as the source or destination for data.
  781 bytes (112 words) - 19:53, 3 June 2023
• Instruction
  ...allest unit of computation which a [[programmer]] can direct the [[Central Processing Unit|CPU]] to perform. ...U (e.g. add the contents of one [[register]] to another, or move a unit of data from a register, to main memory) - those items are instructions. (An instru
  774 bytes (119 words) - 19:50, 3 June 2023

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