KDJ11-E CPU
The KDJ11-E CPU board (M8981) is the third-generation QBUS CPU card using the J-11 chip set of the PDP-11 (the first and second being the the KDJ11-A and KDJ11-B). It is a quad-height board, and is used in the PDP-11/93 and PDP-11/94 systems.
Its principal improvement over the KDJ11-B is that either the first 2M-byte, or its entire 4M-byte main memory (depending on the exact model) is on-board, and operates at the speed of the cache in the KDJ11-B. The KDJ11-E therefore omits the cache found on the earlier boards. The on-board memory is protected by parity only.
It also provides a Time-Of-Year clock (with battery backup), an 800 Hz programmable clock, and seven additional asynchronous serial lines.
Like the KDJ11-B, it also provides a built-in serial console, and ROMs to contain diagnostic and boot programs, and an EEPROM to contain configuration information. Also like the earlier boards, it uses the FPJ11 floating point accelerator to speed up the FP11 implementation in the J-11; the FPJ11 is standard on the KDJ11-E.
See also
Further reading
- KDJ11-E CPU System Maintenance Manual (EK-403AA-MM-001) - not available online
External links
- KDJ11-E CPU Module User Guide (EK-KDJ1E-UG-001)
