Difference between revisions of "KT11-C Memory Management Unit"

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m (External links: +man, eng drws)
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When the KT11-C is not present, the CPU must have an M8116 Segmentation Jumper Board present instead.
 
When the KT11-C is not present, the CPU must have an M8116 Segmentation Jumper Board present instead.
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==External links==
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* [http://www.bitsavers.org/pdf/dec/pdp11/1145/EK-KT11C-MM-005-KT11-C_CD_Memory_Management_Maintenance_Manual_1976.pdf KT11-C memory management unit maintenance manual] (DEC-11-HKTCA-C-D)
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* [http://www.bitsavers.org/pdf/dec/pdp11/1145/EK-KT11C-MM-005-KT11-C_CD_Memory_Management_Maintenance_Manual_1976.pdf KT11-C,CD memory management unit maintenance manual] (EK-KT11C-MM-005)
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* [http://www.bitsavers.org/pdf/dec/pdp11/1145/KT11C_Schem.pdf KT11-C memory management unit engineering drawings] (KT11C-1-A)
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* [http://www.bitsavers.org/pdf/dec/pdp11/1145/KT11-C_Memory_Management_Unit_Engineering_Drawings_Dec75.pdf  KT11-C memory management unit engineering drawings] (KT11C-2-B)
  
 
==See also==
 
==See also==
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{{semi-stub}}
 
{{semi-stub}}
 
{{PDP-11}}
 
  
 
[[Category: PDP-11 Processors]]
 
[[Category: PDP-11 Processors]]

Revision as of 18:47, 6 March 2022

The KT11-C Memory Management Unit is the memory management option for the PDP-11/45. It implements the full PDP-11 Memory Management architecture; in fact, the KT11-C is the archetype for PDP-11 memory management units.

The KT11-C consists of two hex cards:

  • M8107 Segmentation Address Paths

and either:

  • M8108 Segmentation Status Registers

or:

  • M8108-YA Segmentation Status Registers

The M8108 board is found in the KB11-A CPU variant of the -11/45, and the M8108-YA in KB11-D CPU variant.

They both plug into pre-wired slots in the CPU backplane.

When the KT11-C is not present, the CPU must have an M8116 Segmentation Jumper Board present instead.

External links

See also