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Manufacturer: Digital Equipment Corporation
Architecture: PDP-10
Year Design Started: March, 1963
Year First Shipped: June, 1964
Year Discontinued: 1965
Form Factor: small mainframe
Word Size: 36 bits
Logic Type: germanium and silicon transistors
Design Type: asynchronous with hardware subroutines
Clock Speed: 4 μsec (approximately - different instructions take different amounts of time, the CPU is not synchronous)
Memory Speed: 5 μsec (inital), 2 μsec (later)
Physical Address Size: 18 bits
Virtual Address Size: 18 bits
Memory Management: single base and bounds register pair
Operating System: Monitor, ITS, WAITS
Predecessor(s): None
Successor(s): KA10
Price: US$120K (CPU), US$300K (system)

A System Module used in a PDP-6; this example has had its transistors salvaged from it

The PDP-6 was effectively the first model of the PDP-10; they are (mostly) binary-code compatible. It was built out of System Modules, DEC's predecessor to the FLIP CHIP module series (out of which the first PDP-10, the KA10, was built).

The machine was not a success, commercially (only 23 were sold), in part because the hardware was unreliable (largely because of one type of large System Module, which contained one bit of the entire ALU section of the CPU - a 'bridge too far' at the then-current state of printed circuit board technology).

According to Tim Anderson, the Project MAC group Dynamic Modeling/Computer Graphics took delivery of the very last PDP-6 from a previous owner. They adopted the AI Lab's ITS operating system, but shortly after moved onto a PDP-10.

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