Difference between revisions of "PDP-8/E"

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{{Infobox Machine  
 
{{Infobox Machine  
 
| name = PDP-8/E
 
| name = PDP-8/E
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| image = PDP 8 e Trondheim.jpg
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| image = PDP-8'E FlorianSchäffer.jpg
 
| caption = PDP-8/E front panel
 
| caption = PDP-8/E front panel
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<!--
+
| manufacturer = [[Digital Equipment Corporation|DEC]]
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| ram = Maximum of 32 kwords in eight 4 kword banks
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| architecture = [[PDP-8 architecture|PDP-8]]
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-->
 
 
| year introduced = 1970
 
| year introduced = 1970
 
| form factor = [[minicomputer]]
 
| form factor = [[minicomputer]]
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| design type = [[clock]]ed random [[logic]]
 
| design type = [[clock]]ed random [[logic]]
 
| clock speed = 385KHz
 
| clock speed = 385KHz
 +
<!--
 +
| ram = Maximum of 32 kwords in eight 4 kword banks
 +
-->
 
| memory speed = 1.2 μseconds
 
| memory speed = 1.2 μseconds
 
| bus arch = [[OMNIBUS]]
 
| bus arch = [[OMNIBUS]]
−
| memory mgmt = bank selection, CPU mode
+
| memory mgmt = [[bank switching|bank selection]], CPU mode
 
| operating system = [[OS/8]], [[TSS/8]]
 
| operating system = [[OS/8]], [[TSS/8]]
 
| predecessor = [[PDP-8/I]]
 
| predecessor = [[PDP-8/I]]
 
| successor = [[PDP-8/A]]
 
| successor = [[PDP-8/A]]
 +
| price = US$5K (CPU and 4KW memory)
 
}}
 
}}
  
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The '''PDP-8/E''' was an improved model in the [[PDP-8]] line, and introduced the [[OMNIBUS]] for interfacing to [[device controller]]s.
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The '''PDP-8/E''' was an improved model in the [[PDP-8 family|PDP-8 line]] from [[Digital Equipment Corporation|DEC]], and introduced the [[OMNIBUS]] for interfacing to [[device controller]]s.
 +
 
 +
The '''PDP-8/F''' was a cost-reduced version of the -8/E with the same [[Central Processing Unit|CPU]], but only a single OMNIBUS [[backplane]]. The '''PDP-8/M''' is the [[Original Equipment Manufacturer|OEM]] version of the PDP-8/F. Both the /E and /M used the H9191-9216 20-slot [[DEC card form factor|quad]]-width OMNIBUS backplane.
 +
 
 +
The -8/E-F-M's KK8-E CPU consists of five [[DEC card form factor|quad]] boards (M8300 Major Registers, M8310 Register Control, M8320 Bus Loads, M8330 Timing Generator, M8560 [[Teletype]] Control); its standard [[main memory]] was the [[MM8-E Memory System]] [[core memory]], which initially came in 4K [[word]] blocks.
 +
 
 +
Options included:
 +
 
 +
* KA8-E Positive I/O Bus Interface, to allow use of older PDP-8 devices
 +
* KM8-E Memory Extension and Time-Share Option, which provided the [[bank switching]] needed to support more than 4KW of memory, and allowed the computer to operate in either Executive Mode or User Mode (some sources refer to this as the 'MC8/E' - probably by analogy with earlier [[PDP-8 Memory Extension units]] such as the MC8/I and MC8/L - but no DEC documentation refers to that name)
 +
* MP8-E Memory Parity
 +
* KD8-E [[OMNIBUS|Data Break]] Interface
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* KE8-E Extended Arithmetic Element (two quad boards), which supported [[hardware]] integer multiplication and division, one-[[bit]] double-word shifts, and [[normalization]]
 +
* FPP12-P and FPP12-AP [[Floating point processor|Floating Point Processor]] (24+12 bits)
 +
* FPP12-AE Double Precision option (FPP12-AP only, 60+12 bits)
 +
 
 +
It could perform an addition to the [[accumulator]] in 2.6 μseconds, and a 12 by 12 bit multiplication with 24 bit result in 40 μseconds, using the math extension hardware.
 +
 
 +
The -8/M could be supplied with either a KC8-M Operator's Console, or a KC8-ML Programmer's Console, the latter being basically identical to the KC8-EA Programmer's Console of the basic -8/E.
 +
 
 +
==Images==
 +
 +
[[Image:PDP-8'F_SimonClaessen.jpg|400px|PDP-8/F at Hack42 in Arnhem, The Netherlands]]
 +
 
 +
[[Image:PDP-8'M_BrianStuart.jpg|400px|PDP-8/M from Brian Stuart's collection]]
 +
 
 +
[[:File:PDP 8 e Trondheim.jpg|Another image]]
  
−
The '''PDP-8/F''' was a cost-reduced version of the -8/E with the same [[Central Processing Unit|CPU]] and [[main memory]], but only a single OMNIBUS [[backplane]]. The '''PDP-8/M''' is the [[Original Equipment Manufacturer|OEM]] version of the PDP-8/F.
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==External links==
  
−
It could perform an addition to the accumulator in 2.6 microseconds, and a 12 by 12 bit multiplication with 24 bit result in 40 microseconds with the math extension hardware.
+
* [http://www.bitsavers.org/pdf/dec/pdp8/pdp8e/ PDP-8/E documents]
 +
** [http://www.bitsavers.org/pdf/dec/pdp8/pdp8e/PDP-8E_IPB_Feb74.pdf PDP-8/E Illustrated Parts Breakdown]
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** [http://www.bitsavers.org/pdf/dec/pdp8/pdp8e/DEC-8E-HMM1A-D-D_PDP-8e_Maintenance_Manual_Volume_1_Processor_Sep73.pdf PDP-8/E, PDP-8/F & PDP-8/M Maintenance Manual Volume 1] (DEC-8E-HMM1A-D-D) - also covers the MM8-E and Teletype Control
 +
* [https://ethw.org/First-Hand:PDP-8/E_OMNIBUS_Ride First-Hand:PDP-8/E OMNIBUS Ride] - PDP-8/E Design Story
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* [https://hack42.nl/wiki/Digital_PDP-8f Digital PDP-8F]
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* [http://www.vandermark.ch/pdp8/index.php A PDP-8/E Emulator in Java] - lots of other PDP-8 content, too
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** [http://www.vandermark.ch/pdp8/index.php?n=PDP8.Manuals Manuals] - mostly software, but some hardware
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* [https://www.cs.drexel.edu/~bls96/museum/pdp8.html PDP-8/M Restoration Project]
  
 
{{Nav PDP-8}}
 
{{Nav PDP-8}}
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[[Category: PDP-8s]]

Latest revision as of 14:11, 14 July 2023


PDP-8/E
PDP-8'E FlorianSchäffer.jpg
PDP-8/E front panel
Manufacturer: DEC
Architecture: PDP-8
Year Introduced: 1970
Form Factor: minicomputer
Word Size: 12
Logic Type: TTL
Design Type: clocked random logic
Clock Speed: 385KHz
Memory Speed: 1.2 μseconds
Physical Address Size: 32KW (requires optional KM8-E)
Virtual Address Size: 4KW
Memory Management: bank selection, CPU mode
Bus Architecture: OMNIBUS
Operating System: OS/8, TSS/8
Predecessor(s): PDP-8/I
Successor(s): PDP-8/A
Price: US$5K (CPU and 4KW memory)


The PDP-8/E was an improved model in the PDP-8 line from DEC, and introduced the OMNIBUS for interfacing to device controllers.

The PDP-8/F was a cost-reduced version of the -8/E with the same CPU, but only a single OMNIBUS backplane. The PDP-8/M is the OEM version of the PDP-8/F. Both the /E and /M used the H9191-9216 20-slot quad-width OMNIBUS backplane.

The -8/E-F-M's KK8-E CPU consists of five quad boards (M8300 Major Registers, M8310 Register Control, M8320 Bus Loads, M8330 Timing Generator, M8560 Teletype Control); its standard main memory was the MM8-E Memory System core memory, which initially came in 4K word blocks.

Options included:

  • KA8-E Positive I/O Bus Interface, to allow use of older PDP-8 devices
  • KM8-E Memory Extension and Time-Share Option, which provided the bank switching needed to support more than 4KW of memory, and allowed the computer to operate in either Executive Mode or User Mode (some sources refer to this as the 'MC8/E' - probably by analogy with earlier PDP-8 Memory Extension units such as the MC8/I and MC8/L - but no DEC documentation refers to that name)
  • MP8-E Memory Parity
  • KD8-E Data Break Interface
  • KE8-E Extended Arithmetic Element (two quad boards), which supported hardware integer multiplication and division, one-bit double-word shifts, and normalization
  • FPP12-P and FPP12-AP Floating Point Processor (24+12 bits)
  • FPP12-AE Double Precision option (FPP12-AP only, 60+12 bits)

It could perform an addition to the accumulator in 2.6 μseconds, and a 12 by 12 bit multiplication with 24 bit result in 40 μseconds, using the math extension hardware.

The -8/M could be supplied with either a KC8-M Operator's Console, or a KC8-ML Programmer's Console, the latter being basically identical to the KC8-EA Programmer's Console of the basic -8/E.

Images

PDP-8/F at Hack42 in Arnhem, The Netherlands

PDP-8/M from Brian Stuart's collection

Another image

External links


v • d • e PDP-8 Computers, Software and Peripherals
PDP-8s: PDP-5 • PDP-8 • LINC-8 • PDP-8/S • PDP-8/I • PDP-8/L • PDP-12 • PDP-8/E • PDP-8/F • PDP-8/M • PDP-8/A

Workstations: VT78

Also: PDP-8 family • PDP-8 architecture • PDP-8 Memory Extension units

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