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• PDP-10
  ...the KS10 were available in [[multi-processor]] versions with two [[Central Processing Unit|CPUs]]. ...ided for the latter; it allowed peripherals to [[interrupt]] the [[Central Processing Unit|CPU]], and supported [[programmed I/O]] (including block transfers).
  11 KB (1,640 words) - 20:59, 8 March 2024
• PDP-8 architecture
  ...in one field could access data in the same field by direct addressing, or data in another field with indirect addressing. ...ory controller. The 62X1 instuction (CDF, Change Data Field) would set the data field to X. Similarly 62X2, CIF, set the instruction field, 62X3 set both.
  22 KB (3,497 words) - 19:34, 29 November 2022
• Bus
  In computer [[architecture]], a '''bus''' is a subsystem that transfers data or power between computer components inside a computer or between computers ..., it might take too long for the program to check again, resulting in lost data. Engineers thus arranged for the peripherals to interrupt the CPU. The in
  14 KB (2,170 words) - 05:09, 5 September 2019
• VAX-11/785
  {{InfoboxVAX-Data ...1/785''' was an upgraded version of the [[VAX-11/780|/780]]; its [[Central Processing Unit|CPUs]] used [[Advanced Schottky]] [[logic]]. A /780 could be upgraded
  2 KB (193 words) - 04:26, 13 January 2024
• LEO
  * [http://www.cs.man.ac.uk/CCS/res/res02.htm#d Designing a computer for data processing] - personal memories from John Pinkerton, the principal engineer
  2 KB (262 words) - 19:03, 18 March 2024
• MicroVAX 3800/3900
  {{InfoboxVAX-Data ...kplane. (The [[address space]] of the [[QBUS]] was limited to 4MB, and the data section is only 16 bits wide.)
  3 KB (380 words) - 07:06, 31 January 2024
• History of Zork
  ...programming languages like MDL (an important influence on modern Lisp) to data bases, electronic mail and artificially intelligent systems -- if only cent ...ms for keeping track of documents, handling electronic correspondence, and processing text. When Zork was added to the list of possibilities, Joel and Marc worke
  38 KB (6,681 words) - 16:32, 19 December 2018
• Incompatible Timesharing System
  ...al memory|paging]] [[hardware]] (which that generation of PDP-10 [[Central Processing Unit|CPU]] did not have). It later ran on the [[KL10]] and [[KS10]] models ...n units of either [[character]]s or [[word]]s (although an entire block of data could be transferred by a single [[system call]], if desired). All the usua
  12 KB (1,926 words) - 21:29, 8 February 2024
• ITS DDT Guide
  command. It is so powerful that it can leave DDT's data bases ("kills") the current job. All the data in it is lost. The $J
  171 KB (29,660 words) - 17:55, 28 December 2018
• Top
  immediately read for processing. See the section on the process (text, data, and stack), RES is the current
  11 KB (1,552 words) - 13:03, 24 April 2024
• TROPIX Manual
  processing of devices already supported. ........ (and other data from computer) ............
  91 KB (12,020 words) - 17:55, 13 August 2019
• Operating system
  ...mple, operating systems provided [[file system]]s for users to store their data in. ...r could not interfere with another user, so protection of users (and their data, stored on disk) from each other became another function of the operating s
  4 KB (608 words) - 15:04, 9 September 2022
• VT100
  ...the VT100 into [[VT52]] mode (one of the VT series' features) because VT52 processing had less overhead.[1] ...and use every other measure to improve how fast the terminal could process data (see above).
  4 KB (664 words) - 14:34, 11 August 2023
• Intel 80386
  ...r '''i386''' for short) is the 4th generation [[microprocessor]] [[Central Processing Unit|CPU]] from [[Intel]] based on the 8088/8086 CPU. The 386 was a 32-bit ...could only address 16MB of RAM maximum. The 386SX also only could transfer data 16 bits at a time, so reading a 32-bit word took two reads. This basically
  2 KB (372 words) - 01:23, 30 December 2021
• J-11 chip set
  ...ls. It was implemented in two [[integrated circuit|chips]] ('Control' and 'Data') carried on a single 60-pin [[Dual Inline Package|DIP]] carrier. ...full [[PDP-11 Memory Management]] architecture (with split Instruction and Data address space support, as well as Supervisor mode). Although it contains bu
  2 KB (242 words) - 23:19, 29 February 2024
• Intel 4004
  ...-only memory|ROM]], [[Random Access Memory|RAM]] was only used for storing data, and this complicated the life of the [[programmer]] somewhat. ...by the Wxx instructions. (Also, the CM-RAM[0123] lines from the [[Central Processing Unit|processor]] chip are used to control "4002 RAM chips".)
  5 KB (796 words) - 16:01, 14 July 2023
• IBM AT
  ...y Standard Architecture|ISA]] slots, and the 'advanced' [[i286]] [[Central Processing Unit|CPU]]. The IBM AT unlike the [[IBM XT]] is fully 16 bit, with a 16-bit [[data bus]], 24-bit [[address bus]], and 16-bit ISA expansion bus. IBM had also
  2 KB (396 words) - 00:41, 20 October 2018
• COBOL
  ...arily found in [[mainframe]] environments, and is used in business [[batch processing]]. * data
  3 KB (392 words) - 18:34, 14 January 2024
• MSV11-J memory module
  ...-JC versions), it is really intended for use with a PMI-capable [[Central Processing Unit|CPU]], such as the [[KDJ11-B CPU|KDJ11-B]]. In systems such as the [[P The memory is arranged as 2 banks, each 16 data bits wide, with 6 additional bits for the ECC. One bank is used to hold [[w
  8 KB (1,374 words) - 00:43, 30 July 2023
• KA630 CPU
  {{InfoboxVAXCPU-Data The '''KA630''' is the [[Central Processing Unit|CPU]] used in [[Digital Equipment Corporation|DEC]]'s [[MicroVAX II]].
  2 KB (174 words) - 06:15, 28 June 2022

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