MM11-U core memory
The MM11-U was a popular, and fairly common, 32 Kbyte core main memory system for the early PDP-11 UNIBUS machines. An MM11-U was composed of a four board set:
- G114 - hex-width sense/inhibit module
- G235 - hex-width XY Drive, current source, decode module
- H217-D - hex-width core stack
- M7293/M8293 - quad-width timing and control module
(The difference between the M7293 and M8293 is unknown; later documentation always refers to the M8293 only, and it is the one usually seen.)
The MM11-U/UP usually required a custom nine-slot backplane (DEC part number 54-10345 or 70-09295), although some CPU's (e.g. the PDP-11/05) had processor backplanes wired to hold an MM11-U set, as well as the CPU set.
The MF11-U was a backplane plus a single MM11-U board set; the backplane has room for one more MM11-U board set.
There was also a parity-capable variant, the MM11-UP, which added an dual-width M7259 Parity Control Module, and substituted an H217-C (with two more bits per word - for byte parity) for the H217-D. It was only available for the MF11-U, not in the CPUs, since it required an extra slot for the M7259 parity controller.
The board set of the MM11-U (less the M8293) is also used in the MJ11 memory system, and (with the 19-bit wide H217-B variant of the core stack) in the MG10 core memory.
Contents
Module chart
The board organization in the MF11-U backplanes is (viewed from the module side of the backplane):
| Connector | ||||||
|---|---|---|---|---|---|---|
| Slot | A | B | C | D | E | F |
| 1 | UNIBUS In | M8293 Timing + Control | ||||
| 2 | M7259 Parity Controller | Unused | ||||
| 3 | G114 Sense/Inhibit | |||||
| 4 | H217C/D Core stack | |||||
| 5 | G235 X/Y Driver | |||||
| 6 | G235 X/Y Driver | |||||
| 7 | H217C/D Core stack | |||||
| 8 | G114 Sense/Inhibit | |||||
| 9 | UNIBUS Out | M8293 Timing + Control | ||||
The first MM11-U set normally goes in slots 1/3/4/5; when the second MM11-U set was added, it was normally installed in slots 6/7/8/9; the order could be reversed, though.
Parity and non-parity backplane configuration
Installing an MM11-U (non-parity) module set in an MF11-UP backplane will cause the machine to hang when that memory is referenced.
This is because during parity operation, the SSYN signal is routed through the M7259 parity controller board, and that only issues the SSYN once it has checked that the parity is OK. On non-parity installations, the 'proto-SSYN' from the rest of the memory is just hard-wired straight to the output to the UNIBUS.
That requires a jumper on the backplane for non-parity memory: it runs from pin B1U1 to B2U1. This jumper should not be present for parity memory. Note that therefore parity and non-parity memory cannot be mixed on the same backplane.
G235 jumpers
The MM11-U manual (EK-MF11U-MM-003) describes (pg. 3-12) a set of jumpers (W5-W7) on the G235 card (X and Y selection line current generators - those for the inhibit lines are on the G114) which adjust the bias current for the selection line generators. It goes on to say:
- Jumpers W5-W7 are factory cut to adjust the bias current to its optimal value and they should not be changed.
There is apparently a similar adjustment for the timing of the sense strobe.
The original procedure for setting those jumpers is likely lost, as it is probably only in some internal DEC documentation. The manual says (Section 5.4.2, "Sense Strobe Delay and Drive Current Adjustments"):
- Correction of any failure in either the sense strobe delay or drive current circuits on the G235 module that would require reconfiguration of the jumpers within these circuits should not attempted in the field. Replace the faulty module with a spare G235 module and return the faulty G235 module to the factor for repair.
There is a test to know if the bias current is properly adjusted (see Section 5.3.4, "Drive Current Checks"), and also for the strobe delay (Section 5.3.3, "Sense Strobe Delay Checks"). So in theory, if a G235 card fails one of these tests, it should be possible to change the smallest value jumper, and see if that made things worse or better; and then loop.
Board inter-changeability
There was some concern that these boards were 'tuned' to be part of a set. E.g. one of the components, in the circuit that the W5-W7 jumpers are part of, is a thermistor on the core stack board (H217). It is not clear if the jumpers are just for dealing with component variations on the G235 board, or if they also include variation elsewhere. In other words, there was a possibility that MM11-U's came as tuned board sets, which should not be 'mixed and matched'.
However, the second block of text above alleviated that concern: apparently one can replace one G235 with another, without swapping out all the boards in the set.
Thus, any 'mixing and matching' that has happened to these boards if they were removed from their machines has probably not caused any problems.
See also
External links
- MF11-U/UP core memory system maintenance manual (DEC-11-HMFMA-B-D)
- MF11-U/UP core memory system maintenance manual (EK-MF11U-MM-003)
- MF11-U/UP memory system engineering drawings
