PDP-8/I

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PDP-8/I
Year Introduced: 1968
Form Factor: minicomputer
Word Size: 12
Logic Type: TTL
Design Type: clocked random logic
Clock Speed: 333KHz
Memory Speed: 1.5 μseconds
Physical Address Size: 32KW (requires optional MC8/I)
Virtual Address Size: 4KW
Memory Management: bank selection, CPU mode
Bus Architecture: negative I/O bus
Operating System: TSS/8. Disk Monitor System
Predecessor(s): PDP-8
Successor(s): PDP-8/E


The PDP-8/I was introduced in 1968 as the successor to the PDP-8. It was constructed out of TTL ICs on M-class FLIP CHIPs.

Options included:

  • KA8/IB Positive I/O Bus Interface, to allow use of newer PDP-8 devices
  • MC8/I Memory Extension Control, which was needed to support more than 4K words of memory
  • MP8/I Memory Parity
  • KE8/I Extended Arithmetic Element, which supported hardware integer multiplication and division, one-bit double-word shifts, and normalization
  • KT8/I Time Sharing Hardware Modification, which allowed the computer to operate in either Executive Mode or User Mode

It could perform an addition to the accumulator in 3.0 μseconds, and a 12 by 12 bit multiplication with 24 bit result in 6.0 μseconds, using the math extension hardware.