KDF11 CPUs: Difference between revisions
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All the KDF11 CPUs have two choices for [[floating point]] support (full PDP-11 [[FP11 floating point]]): a on-board single [[integrated circuit|chip]], the [[KEF11-A floating point chip]], which implements floating point using microcode; and a higher-performance [[co-processor]] on a separate [[DEC card form factor|quad]] board, the [[FPF11 floating point processor|FPF11]] (M8188). | All the KDF11 CPUs have two choices for [[floating point]] support (full PDP-11 [[FP11 floating point]]): a on-board single [[integrated circuit|chip]], the [[KEF11-A floating point chip]], which implements floating point using microcode; and a higher-performance [[co-processor]] on a separate [[DEC card form factor|quad]] board, the [[FPF11 floating point processor|FPF11]] (M8188). | ||
The FPF11 communicates with the KDF11 via a [[flat cable]] | The FPF11 communicates with the KDF11 via a [[flat cable]] which plugs into the [[chip socket]] on the KDF11 where the KEF11-A is installed. The KDF11 is unusual, in that it can plug into either a QBUS or UNIBUS [[backplane]], since it draws only power from the backplane - all [[signal]]s come over the cable to the KDF11. | ||
==See also== | ==See also== | ||
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* ''LSI-11/23 Processor Differences'', MicroNote #078 | * ''LSI-11/23 Processor Differences'', MicroNote #078 | ||
* ''System Differences - LSI-11 vs. LSI-11/23'', MicroNote #049 | * ''System Differences - LSI-11 vs. LSI-11/23'', MicroNote #049 | ||
** ''LSI-11/23 I/O Page Addressing'', MicroNote #080A | |||
* ''Peripheral Compatibility with 11/23 Systems'', MicroNote #072 | |||
* ''Parity Memory in LSI-11/23 Systems'', MicroNote #052 | |||
* ''Wake-up Circuit Implementations'', MicroNote #085 | |||
==External links== | |||
* [http://web.frainresearch.org:8080/projects/pdp-11/dcf11.php DCF11 Processors] (mirrored [https://electrickery.nl/comp/pdp11_23plus/frain.rsx11m.io/dcf11.php here]) | |||
[[Category: PDP-11 UNIBUS Processors]] | [[Category: PDP-11 UNIBUS Processors]] | ||
[[Category: PDP-11 QBUS Processors]] | [[Category: PDP-11 QBUS Processors]] | ||
Latest revision as of 06:37, 11 October 2026
The KDF11 CPUs are single-board PDP-11 CPUs which all use the 'Fonz' F-11 chip set:
- KDF11-A CPU - M8186 - QBUS dual-width CPU used in the PDP-11/23
- KDF11-B CPU - M8189 - QBUS quad-width CPU used in the PDP-11/23+
- KDF11-U CPU - M7133 - UNIBUS hex-width CPU used in the PDP-11/24
The basic clock µcycle is 300 nsec; simple register-register instructions (e.g. MOV, ADD, etc) took 1.7 µseconds (1.2 µseconds on the KDF11-U). Depending on the operand modes used in a particular instruction, and the main memory speed (with the asynchronous QBUS), that could add up to roughly 8.5 µseconds (4.2 µseconds on the KDF11-U) to that basic time. (The extra time is roughly linear in the number of memory cycles, at roughly 1.2 µseconds (0.8 µseconds on the KDF11-U) per cycle - PDP-11 instructions could add up to 6 additional memory cycles per instruction, above the 1 needed to fetch the basic instruction.)
Like the LSI-11 models, as a cost-reduction measure they do not have a front panel to control them; instead, when the CPU is halted, specialized microcode used the main asynchronous serial line as a operating console. The command set is named Octal Debugging Technique (ODT); there are commands to read and write main memory, start the CPU, etc.
The main asynchronous serial interface is normally configured so that when the CPU is running, sending a break on the console serial line halts the CPU.
Floating point
All the KDF11 CPUs have two choices for floating point support (full PDP-11 FP11 floating point): a on-board single chip, the KEF11-A floating point chip, which implements floating point using microcode; and a higher-performance co-processor on a separate quad board, the FPF11 (M8188).
The FPF11 communicates with the KDF11 via a flat cable which plugs into the chip socket on the KDF11 where the KEF11-A is installed. The KDF11 is unusual, in that it can plug into either a QBUS or UNIBUS backplane, since it draws only power from the backplane - all signals come over the cable to the KDF11.
See also
Further reading
- LSI-11/23 Instruction Timing, MicroNote #048
- LSI-11/23 Processor Differences, MicroNote #078
- System Differences - LSI-11 vs. LSI-11/23, MicroNote #049
- LSI-11/23 I/O Page Addressing, MicroNote #080A
- Peripheral Compatibility with 11/23 Systems, MicroNote #072
- Parity Memory in LSI-11/23 Systems, MicroNote #052
- Wake-up Circuit Implementations, MicroNote #085
External links
- DCF11 Processors (mirrored here)
