Difference between revisions of "KDF11 CPUs"

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There are several single-board CPUs which all use the 'Fonz' [[F-11 chipset]]:
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The '''KDF11 CPUs''' are single-[[printed circuit board|board]] [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Fonz' [[F-11 chip set]]:
  
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*[[KDF11-A CPU]] - M8186 - [[QBUS]] [[DEC card form factor|dual]]-width CPU used in the [[PDP-11/23]]
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* [[KDF11-A CPU]] - M8186 - [[QBUS]] [[DEC card form factor|dual]]-width CPU used in the [[PDP-11/23]]
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*[[KDF11-B CPU]] - M8189 - QBUS quad-width CPU used in the [[PDP-11/23_PLUS|PDP-11/23+]]
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* [[KDF11-B CPU]] - M8189 - QBUS quad-width CPU used in the [[PDP-11/23_PLUS|PDP-11/23+]]
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*[[KDF11-U CPU]] - M7133 - [[UNIBUS]] hex-width CPU used in the [[PDP-11/24]]
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* [[KDF11-U CPU]] - M7133 - [[UNIBUS]] hex-width CPU used in the [[PDP-11/24]]
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The basic [[clock]] µcycle is 300 nsec; simple [[register]]-register [[instruction]]s (e.g. MOV, ADD, etc) took 1.7 µseconds (1.2 µseconds on the KDF11-U). Depending on the [[operand]] [[PDP-11 architecture#Operands|modes]] used in a particular instruction, and the [[main memory]] speed (with the [[asynchronous]] QBUS), that could add up to roughly 8.5 µseconds (4.2 µseconds on the KDF11-U) to that basic time. (The extra time is roughly linear in the number of [[memory cycle]]s, at roughly 1.2 µseconds (0.8 µseconds on the KDF11-U) per cycle - PDP-11 instructions could add up to 6 additional memory cycles per instruction, above the 1 needed to [[fetch]] the basic instruction.)
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Like the [[LSI-11 CPUs|LSI-11]] models, as a cost-reduction measure they do not have a [[front panel]] to control them; instead, when the CPU is halted, specialized [[microcode]] used the main [[asynchronous serial line]] as a operating console. The command set is named Octal Debugging Technique ([[QBUS CPU ODT|ODT]]); there are commands to read and write [[main memory]], start the CPU, etc.
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The main asynchronous serial [[device controller|interface]] is normally configured so that when the CPU is running, sending a [[asynchronous serial line|break]] on the console serial line [[halt]]s the CPU.
  
 
==Floating point==
 
==Floating point==
  
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All the KDF11 CPUs have two choices for floating point support (full PDP-11 [[FP11 floating point]]): a on-board single chip, the [[KEF11-A floating point chip]], which implements floating point using microcode; and a higher-performance separate quad board, the [[FPF11]] (M8188).
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All the KDF11 CPUs have two choices for [[floating point]] support (full PDP-11 [[FP11 floating point]]): a on-board single [[integrated circuit|chip]], the [[KEF11-A floating point chip]], which implements floating point using microcode; and a higher-performance [[co-processor]] on a separate [[DEC card form factor|quad]] board, the [[FPF11 floating point processor‎|FPF11]] (M8188).
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The FPF11 communicates with the KDF11 via a cable that plugs into the socket on the KDF11 where the KEF11-A is installed; is unusual that it can plug into either a QBUS or UNIBUS backplane, since it only draws power from the backplane - all signals come over the cable to the KDF11.
 
  
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==ODT limitations==
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The FPF11 communicates with the KDF11 via a [[flat cable]] that plugs into the [[chip socket]] on the KDF11 where the KEF11-A is installed; is unusual that it can plug into either a QBUS or UNIBUS [[backplane]], since it draws only power from the backplane - all [[signal]]s come over the cable to the KDF11.
  
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The F-11 chip set includes microcode which provides 'front panel' functionality named 'ODT'; the ability to read and write to memory, start the process, etc. However, the original version of the KDF11-A only supported 18-bit addressing, and even though later versions supported 22-bit addressing, ODT in the KDF11's was always limited to 18-bit addressing: i.e. it is impossible to interact with memory above 256 Kbytes from ODT.
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==See also==
  
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The later [[KDJ11 CPUs]] do not have this limitation.
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* [[LSI-11 CPUs]]
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* [[KDJ11 CPUs]]
  
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{{PDP-11}}
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==Further reading==
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* ''LSI-11/23 Instruction Timing'', [[MicroNote]] #048
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* ''LSI-11/23 Processor Differences'', MicroNote #078
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* ''System Differences - LSI-11 vs. LSI-11/23'', MicroNote #049
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** ''LSI-11/23 I/O Page Addressing'', MicroNote #080A
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* ''Peripheral Compatibility with 11/23 Systems'', MicroNote #072
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* ''Parity Memory in LSI-11/23 Systems'', MicroNote #052
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* ''Wake-up Circuit Implementations'', MicroNote #085
  
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[[Category:UNIBUS processors]]
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[[Category: PDP-11 UNIBUS Processors]]
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[[Category: PDP-11 QBUS Processors]]

Latest revision as of 16:03, 29 July 2024

The KDF11 CPUs are single-board PDP-11 CPUs which all use the 'Fonz' F-11 chip set:

The basic clock µcycle is 300 nsec; simple register-register instructions (e.g. MOV, ADD, etc) took 1.7 µseconds (1.2 µseconds on the KDF11-U). Depending on the operand modes used in a particular instruction, and the main memory speed (with the asynchronous QBUS), that could add up to roughly 8.5 µseconds (4.2 µseconds on the KDF11-U) to that basic time. (The extra time is roughly linear in the number of memory cycles, at roughly 1.2 µseconds (0.8 µseconds on the KDF11-U) per cycle - PDP-11 instructions could add up to 6 additional memory cycles per instruction, above the 1 needed to fetch the basic instruction.)

Like the LSI-11 models, as a cost-reduction measure they do not have a front panel to control them; instead, when the CPU is halted, specialized microcode used the main asynchronous serial line as a operating console. The command set is named Octal Debugging Technique (ODT); there are commands to read and write main memory, start the CPU, etc.

The main asynchronous serial interface is normally configured so that when the CPU is running, sending a break on the console serial line halts the CPU.

Floating point

All the KDF11 CPUs have two choices for floating point support (full PDP-11 FP11 floating point): a on-board single chip, the KEF11-A floating point chip, which implements floating point using microcode; and a higher-performance co-processor on a separate quad board, the FPF11 (M8188).

The FPF11 communicates with the KDF11 via a flat cable that plugs into the chip socket on the KDF11 where the KEF11-A is installed; is unusual that it can plug into either a QBUS or UNIBUS backplane, since it draws only power from the backplane - all signals come over the cable to the KDF11.

See also

Further reading

  • LSI-11/23 Instruction Timing, MicroNote #048
  • LSI-11/23 Processor Differences, MicroNote #078
  • System Differences - LSI-11 vs. LSI-11/23, MicroNote #049
    • LSI-11/23 I/O Page Addressing, MicroNote #080A
  • Peripheral Compatibility with 11/23 Systems, MicroNote #072
  • Parity Memory in LSI-11/23 Systems, MicroNote #052
  • Wake-up Circuit Implementations, MicroNote #085
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