Difference between revisions of "PDP-11"
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|Bus Type | |Bus Type | ||
|Memory Addressing | |Memory Addressing | ||
| + | |Notes | ||
|- | |- | ||
| − | |[[PDP-11/20]]|([[1970]])|[[UNIBUS]]|16-bit | + | |[[PDP-11/20]] |
| + | |([[1970]]) | ||
| + | |[[UNIBUS]] | ||
| + | |16-bit | ||
| + | | | ||
| + | |- | ||
| + | |[[PDP-11/05]] | ||
| + | |([[1972]]) | ||
| + | |[[UNIBUS]] | ||
| + | |16-bit | ||
| + | | | ||
| + | |- | ||
| + | |[[PDP-11/10]] | ||
| + | |([[1972]]) | ||
| + | |[[UNIBUS]] | ||
| + | |16-bit | ||
| + | | | ||
| + | |- | ||
| + | |[[PDP-11/15]] | ||
| + | |([[1972]]) | ||
| + | |[[UNIBUS]] | ||
| + | |16-bit | ||
| + | |OEM model | ||
| + | |- | ||
| + | |[[PDP-11/40]] | ||
| + | |([[1973]]) | ||
| + | |[[UNIBUS]] | ||
| + | |18-bit | ||
| + | | | ||
| + | |- | ||
| + | |[[PDP-11/45]] | ||
| + | |([[1973]]) | ||
| + | |[[UNIBUS]] | ||
| + | |18-bit | ||
| + | |core memory | ||
| + | |- | ||
| + | |[[PDP-11/50]] | ||
| + | |([[1975]]) | ||
| + | |[[UNIBUS]] | ||
| + | |18-bit | ||
| + | |MOS memory | ||
|- | |- | ||
|} | |} | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
*[[PDP-11/70]] ([[1975]]) - [[UNIBUS]], 22-bit memory addressing (2048KiW max) | *[[PDP-11/70]] ([[1975]]) - [[UNIBUS]], 22-bit memory addressing (2048KiW max) | ||
*[[PDP-11/03]] ([[1975]]) - [[QBUS]], 16-bit memory addressing (32KiW max), first QBUS model, first F-11 | *[[PDP-11/03]] ([[1975]]) - [[QBUS]], 16-bit memory addressing (32KiW max), first QBUS model, first F-11 | ||
| Line 36: | Line 71: | ||
*[[PDP-11/93]] ([[1990]]) - [[QBUS]], 22-bit memory addressing, J-11 at 18MHz, integrated FPU, 2MiW onboard memory | *[[PDP-11/93]] ([[1990]]) - [[QBUS]], 22-bit memory addressing, J-11 at 18MHz, integrated FPU, 2MiW onboard memory | ||
*[[PDP-11/94]] ([[1990]]) - [[UNIBUS]], 22-bit memory addressing, J-11 at 18MHz, integrated FPU, 2MiW onboard memory | *[[PDP-11/94]] ([[1990]]) - [[UNIBUS]], 22-bit memory addressing, J-11 at 18MHz, integrated FPU, 2MiW onboard memory | ||
| + | |||
[[Category:DEC architectures]] | [[Category:DEC architectures]] | ||
Revision as of 23:24, 15 May 2007
The PDP-11 is a series of computers introduced in 1970 by Digital Equipment Corporation (DEC).
The machine word size was 16 bits. For more information, see PDP-11 architecture.
PDP-11 Models and notes
| Model | Year of Introduction | Bus Type | Memory Addressing | Notes |
| PDP-11/20 | (1970) | UNIBUS | 16-bit | |
| PDP-11/05 | (1972) | UNIBUS | 16-bit | |
| PDP-11/10 | (1972) | UNIBUS | 16-bit | |
| PDP-11/15 | (1972) | UNIBUS | 16-bit | OEM model |
| PDP-11/40 | (1973) | UNIBUS | 18-bit | |
| PDP-11/45 | (1973) | UNIBUS | 18-bit | core memory |
| PDP-11/50 | (1975) | UNIBUS | 18-bit | MOS memory |
- PDP-11/70 (1975) - UNIBUS, 22-bit memory addressing (2048KiW max)
- PDP-11/03 (1975) - QBUS, 16-bit memory addressing (32KiW max), first QBUS model, first F-11
- PDP-11/34 (1976) - UNIBUS, 18-bit memory addressing (128KiW max)
- PDP-11/04 (1976) - UNIBUS, 16-bit memory addressing (32KiW max)
- PDP-11/55 (1976) - UNIBUS, 18-bit memory addressing (128KiW max), fast bipolar memory
- PDP-11/60 (1977) - UNIBUS, 18-bit memory addressing, writable control store
- PDP-11/23 (1979) - QBUS, 18-bit or 22-bit addressing depending on backplane
- PDP-11/24 (1979) - UNIBUS, 22-bit memory addressing, first UNIBUS model to use F-11 chip
- PDP-11/44 (1979) - UNIBUS, 22-bit memory addressing, last non-LSI PDP-11
- PDP-11/23+ (1981) - QBUS, 22-bit memory addressing
- PDP-11/73 (1983) - QBUS, 22-bit memory addressing, first J-11 machine, 15MHz, integrated FPU, also first PMI PDP-11
- PDP-11/53 (1984) - QBUS, 22-bit memory, S-box or standard qbus, integrated FPU, integrated
- PDP-11/83 (1986) - QBUS, 22-bit memory addressing, J-11 at 18MHz, integrated FPU
- PDP-11/84 (1986) - UNIBUS, 22-bit memory addressing, J-11 at 18MHz, integrated FPU, 768KiW memory.
- PDP-11/93 (1990) - QBUS, 22-bit memory addressing, J-11 at 18MHz, integrated FPU, 2MiW onboard memory
- PDP-11/94 (1990) - UNIBUS, 22-bit memory addressing, J-11 at 18MHz, integrated FPU, 2MiW onboard memory
