DH11 asynchronous serial line interface
The DH11 asynchronous serial line interface is a UNIBUS peripheral which provides up to 16 asynchronous serial lines. Output used DMA (with each line having its own buffer pointer and count); on input a 64-character FIFO buffer made over-runs unlikely.
As a UNIBUS device, it was usable on the PDP-11 and VAX computers. Although it first appeared very early on in the lifetime of the PDP-11, it was extremely powerful and flexible, and remained an option for a very long time.
The parameters for each line:
- separate input and output baud rates
- character length (5-8 bits)
- stop bits (1, 1-1/2 and 2)
- parity (odd, even, none)
Fourteen supported baud rates ranged from 50 to 9600, along with 0 (to disable a line); two additional speeds were available with optional clock FLIP CHIPs. A 'break' condition on the line (i.e. continuous assertion) could also be generated and detected.
For modem control, a single DM11-BB Modem Control Option per DH11, mounted in the main DH11 backplane along with the rest of the DH11 cards, was required. (The DM11-BB is logically a separate device, albeit one housed in the DH11.)
- 1 Device registers
- 2 Initial implementation
- 3 Design flaw
- 4 Later implementations
- 5 External links
The registers LPR through BCR are replicated, with one for each line in the device; the 'Line' field in the SCR indicates which one is currently available.
|System Control Register||DHSCR||760020|
|Next Received Character Register||DHNRCR||760022|
|Line Parameter Register||DHLPR||760024|
|Current Address Register||DHCAR||760026|
|Byte Count Register||DHBCR||760030|
|Buffer Active Register||DHBAR||760032|
|Break Control Register||DHBRCR||760034|
|Silo Status Register||DHSSR||760034|
The addresses shown are for the first DH11 in a system; additional ones are normally set to be at 760040, 760060.
760020: System Control Register (DHSCR)
760022: Next Received Character Register (DHNRCR)
760024: Line Parameter Register (DHLPR)
760034: Silo Status Register (DHSSR)
The original implementation took an entire double system unit, containing multiple cards (see list below). It came in 'earlier' and 'later' versions.
In the 'early' versions, modular 'line conditioning' units from the DF11 Communications Line Adapter series allowed support of either 20mA or EIA RS-232 serial lines; these were installed in a separate rack-mounted dual-height backplane (which required its own independent power supply).
The available line conditioning units included the DM11-DA (20mA line conditioning) and the DM11-DB (EIA, no modem conrol). Each supported four lines; thus, with these, line conditioning could be mixed in groups of four. The 'early' version with the DM11-BB connected to four DM11-DC's.
In the 'later' units, to reduce the cost, line conditioning was performed by a board mounted in the main DH11 backplane, and a rack-mounted passive H317-B distribution panel provided connectors for individual lines.
These 'later' versions only supported EIA-type line conditioning (with or without modem control); to add modem control, a different implementation of the DM11-BB was required (one which did the EIA level conversion on the control lines internally).
The 'early' versions of the DH11 were:
- DH11-AA - Basic unit (110VAC), requires DM11-D's in addition
- DH11-AB - Telegraph line version (see below)
- DH11-AC - Basic unit (220VAC), requires DM11-D's in addition
The 'later' versions were:
- DH11-AD - EIA level conversion, modem control
- DH11-AE - EIA level conversion, no modem control
For the telegraph line option, the line conditioning backplane and its power supply were omitted, and up to two DH11's were connected to a DC08CS Telegraph Converter Panel.
The 'basic' DH11 included the following hex-width boards:
- M7277 - Transmit scanner
- M7278 - Registers and byte count
- M7288 - Line parameters control
- M7289 - Receiver scanner
a dual-width and two quads:
- M7279 - FIFO buffer
- M7280 (2) - Octal UARTs
and a number of single-width cards:
- M4540 - Crystal clock
- M7360 - Priority selector
- M796 - UNIBUS master control
- M7821 (2) - Interrupt control (transmit. receive, and NPR)
- M405 - Baud clock (optional; 2)
|1||UNIBUS In||Reserved for DM11-BB|
|2||M7821||M796||Reserved for DM11-BB|
|9||UNIBUS Out||M7279||M405 (optional)||M4540|
An optional M794 maintenance card could be plugged into the slot normally used by the M971, for testing.
The 'later' versions of the DH11 both included:
- M5906 EIA conversion module
which occupied a dual slot (used by an M7360 Priority Selector card and an M971 Cable Connector card, used to connect the DH11 to the line conditioning units, in the 'early' versions).
The -AD version, which included a 'later' DM11-BB for modem control, also used:
- M7807 - Mux and Bus Control
- M7808 - Mux and Modem Scan Control
These boards fitted into the same slots occupied by the DM11-BB boards in the 'early' versions (the M7807 in slot 1, the M7808 in slot 2).
Line conditioning boards
The line conditioning units, mounted in the separate backplane used in the 'early' versions, included, in the DM11-DA:
- M596 - TTL to 20mA Level Converter (4 channels each)
- M973 - Mate-N-Lok header
and in the DM11-DB:
- M594 - TTL to EIA Level Converter (4 channels each)
- W404 - DTR Jumper card
The DM11-DC used only the M594.
The rack-mounted passive distribution panel initially used in the 'later' versions was the H317-B passive distribution panel, initially created for the DJ11, which mounted directly into a standard 19" rack, and contained 16 DB-25P connectors.
It was connected to the DH11 with a pair of BC08S cables, which carried the 'main' signals (data, etc - i.e. non-modem control); these cables were thus required for both 'later' versions. For the modem control signals (Carrier Detect, etc) used with the DH11-AD, four BC08R cables were used.
Later, the H3007 8-line EIA distribution panel, designed for use in later DEC cabinets with improved EMI characteristics, was introduced; the H3007 fits into the standard panel 21cm x 10cm cutout found in these systems.
Some time after it was introduced, it became apparent that there was a design flaw associated with the 'silo alarm' functionality. This mechanism allowed increased processing efficiency by allowing multiple input characters to be processed with a single interrupt; it involved a register (the 'Silo Alarm Level') which contained a count of the number of characters required in the input buffer (the 'silo') before an interrupt was generated.
The problem is that if less characters than that arrive, and then no more, an interrupt is never generated. So, code which uses higher levels for the silo alarm has to periodically check to see if less characters than that have arrived, and are waiting.
(Apparently, the designer admitted that this was a flaw; he indicated that there should have been a timer, such that after the first character entered the silo, if the silo was still non-empty after the timer ran out, an interrupt would be generated.)