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• Computer Emulation Framework
  Inherent in the CEF specification for CPUs is optional support for profiling, breakpoints/watchpoints, assembly and di The available CPU components are DEC PDP-11 (up to 11/34), Intel 8008, Intel 8080/8085, Zilog Z80, RCA CDP1802/1
  4 KB (620 words) - 21:10, 14 January 2024
• NetBSD 0.9 announcement
  cpus for which there is a cpu declaration (see kernel Modified the SCSI disk startup so that DEC disks (for example)
  29 KB (4,794 words) - 18:15, 16 December 2018
• KDF11-B CPU
  ...F11-BA M8189, using the same 'Fonz' [[F-11 chip set]] as the other [[KDF11 CPUs]]. ...tor]] headers on the top edge of the card, using the standard 10-[[pin]] [[DEC asynchronous serial line pinout]]. They both provided [[EIA RS-232 serial l
  3 KB (507 words) - 10:58, 29 March 2022
• INTEL 80386 PROGRAMMER'S REFERENCE MANUAL
  DEC and flags that support a numerics coprocessor and multiple CPUs with shared
  890 KB (107,817 words) - 03:20, 3 January 2024
• LSI-11
  ...BUS]], and using the [[LSI-11 chip set]]. It was the first of the [[LSI-11 CPUs]]; it had the same QBUS limitations, and use of [[QBUS CPU ODT|ODT]] for co The LSI-11 is a [[DEC card form factor|quad]] board (M7264) with additional functionality on-boar
  3 KB (411 words) - 22:06, 20 December 2023
• LSI-11/2
  ...1/2''' (also known as the '''KD11-HA''') is the later type of the [[LSI-11 CPUs]], using the same [[LSI-11 chip set‎]]. It contains only the [[Central Pr It is a [[DEC card form factor|dual]] board (M7270); it supports all the same options as
  2 KB (336 words) - 18:34, 19 July 2023
• UNIX* System V and 4.1C BSD
  Berkeley), based on experience with both systems on a DEC 10.3 DEC.......................................... 36
  113 KB (13,419 words) - 02:06, 17 December 2018
• MM11-U core memory
  * G114 - [[DEC card form factor‎|hex-width]] sense/inhibit module The MM11-U/UP usually required a custom nine-slot [[backplane]] ([[DEC part number]] 54-10345 or 70-09295), although some [[Central Processing Uni
  6 KB (1,023 words) - 04:53, 22 October 2021
• KB11
  ...[[Digital Equipment Corporation|DEC]] [[PDP-11]] [[Central Processing Unit|CPUs]]:
  679 bytes (112 words) - 05:57, 29 August 2018
• Extended UNIBUS
  The '''Extended UNIBUS''' or '''EUB''' was [[Digital Equipment Corporation|DEC]]'s name for both an upgrade to their standard [[UNIBUS]] [[PDP-11]] bus, t ...their main backplanes (the ones which held their [[Central Processing Unit|CPUs]]).
  3 KB (556 words) - 16:00, 6 February 2024
• PDP-11 Memory Management
  ...subset' machines, SSR1 and (usually) SSR3 are not implemented (the [[KDF11 CPUs]] are an exception to the latter; see below). ...[[PDP-11/70]], [[PDP-11/44]], and machines with the KDF11 CPUs and [[KDJ11 CPUs]].
  9 KB (1,311 words) - 18:10, 2 July 2023
• KDF11 CPUs
  ...ingle-[[printed circuit board|board]] [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Fonz' [[F-11 chip set]]: * [[KDF11-A CPU]] - M8186 - [[QBUS]] [[DEC card form factor|dual]]-width CPU used in the [[PDP-11/23]]
  3 KB (394 words) - 13:49, 29 March 2022
• KDF11-U CPU
  ...plugs into a custom slot in the likewise custom PDP-11/24 [[backplane]] ([[DEC part number]] 54-13817, assembly 70-16905). ...mplementing the [[PDP-11 Commercial Instruction Set]] (CIS) (not all KDF11 CPUs can hold this). In addition to the basic CPU functionality, the board also
  6 KB (1,087 words) - 16:16, 6 February 2024
• KDJ11 CPUs
  There are several single-board [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Jaws' [[J-11 chipset]]: * [[KDJ11-A CPU]] - M8192 - [[QBUS]] [[DEC card form factor|dual]]-width CPU
  3 KB (457 words) - 14:32, 21 February 2023
• F-11 chip set
  ...implementation of the [[PDP-11 architecture]]. It was used in the [[KDF11 CPUs]]. The main [[Central Processing Unit|CPU]] was implemented in two [[integr ...implements the [[PDP-11 Commercial Instruction Set]] (CIS); not all KDF11 CPUs can hold this, though.
  2 KB (384 words) - 23:50, 28 March 2022
• FP11 floating point
  ...ng mode for each, and whether floating results were rounded, or 'chopped' (DEC's term for truncated, to avoid confusion with series truncation). * [[KEF11-A floating point chip|KEF11-A]], used in the [[KDF11 CPUs]]
  3 KB (406 words) - 20:42, 13 June 2023
• LINC-8
  ...ata break]] mechanism). A combined [[front panel]] allowed control of both CPUs. ...ed of discrete [[transistor]] [[FLIP CHIP]]s, mostly R- and S-series, in [[DEC card form factor|standard-length single-height]] (width) format, with a few
  2 KB (328 words) - 13:46, 11 July 2023
• KEF11-A floating point chip
  ...chip''' is an optional [[integrated circuit|chip]] for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It contains [[microcode]] to implement t ...03C7-AA (only the A revision of both has been seen). The entire carrier is DEC part # 57-00001-01-A1 (although 57-00001-00 is occasionally seen - but with
  899 bytes (153 words) - 17:43, 12 March 2021
• KTF11-A memory management chip
  ...11-A memory management chip''' is an optional chip for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It implemented the standard [[PDP-11 Mem The KTF11-A chip was the DC304, [[DEC part number]] 21-15542-0n (where n is a digit giving the revision; 0 and 1
  762 bytes (124 words) - 13:41, 12 August 2022
• System unit
  ...' is a standard modular [[backplane]] from [[Digital Equipment Corporation|DEC]], used mostly in [[UNIBUS]] [[PDP-11]]s. The initial system units were [[DEC card form factor|hex]] height, four-slot assemblies. (Sometimes a number of
  1 KB (178 words) - 15:45, 23 December 2023

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