The LSI-11 was DEC's first cost-reduced PDP-11 CPU, introducing the QBUS, and using the LSI-11 chip set. It was the first of the LSI-11 CPUs; it had the same QBUS limitations, and use of ODT for control, as the others.
The usual CPU options were available for the LSI-11: the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS; the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS). It also supported the optional KUV11 Writeable Control Store.
Many different LSI-11 models exist, including the KD11-F and KD11-H base versions, and numerous other variants. The KD11-F version includes 4KW of MOS RAM on-board; the KD11-H version has the RAM deleted.
Others included various KEV11 chips pre-installed:
- the KD11-L is a KD11-F with a KEV11-A
- the KD11-N is a KD11-H with a KEV11-A
- the KD11-P is a KD11-F with a KEV11-C
- the KD11-Q is a KD11-H with a KEV11-C
Some models include additional cards:
- the KD11-J is a KD11-H sold with an MMV11-A QBUS core memory card
- the KD11-R is a KD11-H sold with an MSV11-C QBUS MOS memory card
- -11/03 - documentation at Bitsavers
- LSI-11 Processors
|v • d • e PDP-11 Computers and Peripherals|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70|
PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94
Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FIS floating point • FP11 floating point • PDP-11 Commercial Instruction Set • PDP-11 Memory Management • PDP-11 stacks • PDP-11 family differences