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• KD11-EA CPU
  ...he [[Central Processing Unit|CPU]] for the [[PDP-11/34A]] version of the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit bo | E74 || 23-110A1 || 32x8 || [[PDP-11 Extended Instruction Set|EIS]] Decoder
  6 KB (1,045 words) - 22:47, 31 March 2022
• KY11-LA Operator's Console
  [[Image:KY11-LA.jpg|thumb|right|300px|A KY11-LA Operator's Console on a PDP-11/04]] ...''' was the standard basic [[front panel]] for the [[PDP-11/04]] and the [[PDP-11/34]] (the units for the two machines differed only in the number painted on
  2 KB (358 words) - 18:29, 3 April 2022
• FPJ11 floating point accelerator
  ...[[floating point]] [[co-processor]] for the DCJ11 [[J-11 chip set|J-11]] [[PDP-11]] [[Central Processing Unit|CPU]] [[integrated circuit|chip]], which implem * [https://www.subgeniuskitty.com/development/pdp-11/references/fpj11_compat DCJ11/FPJ11 Compatibility]
  2 KB (276 words) - 21:06, 2 July 2023
• KS10
  The '''KS10''' was the fourth and last generation of [[PDP-10]] processors (themselves, exact re-implementations of the earlier [[PDP-6]] architecture [[Category: PDP-10 Processors]]
  8 KB (1,237 words) - 19:48, 14 July 2023
• FP11-A Floating-Point Processor
  ...[DEC card form factor|hex]] board, the '''M8267'''. It supports the full [[PDP-11]] [[FP11 floating point]]. ..., and a 10 pin connector to the M8266 card. (This was likely because the [[PDP-11/34]] could be field-upgraded from a [[KD11-E CPU]], which did not support t
  4 KB (734 words) - 02:17, 13 October 2022
• KK11-A Cache Memory
  ...U through an '[[over the back]]' connector. (This was likely because the [[PDP-11/34]] could be field-upgraded from a [[KD11-E CPU]], which did not support t ...s are at the same locations as some of the memory/cache registers in the [[PDP-11/70]], but they are generally incompatible with those in the /70, except as
  4 KB (553 words) - 02:36, 12 October 2022
• KD11-A CPU
  ...''' [[PDP-11]] [[Central Processing Unit|CPU]] for the [[PDP-11/35]] and [[PDP-11/40]] was a multi-board [[microcode|micro-programmed]] processor. Support for the [[PDP-11 Extended Instruction Set|EIS]] was optional, with the [[KE11-E Extended Ins
  4 KB (588 words) - 05:52, 8 April 2024
• DL10 PDP-11 Data Link
  ...the PDP-11's [[main memory]], and vice versa (although the ability of the PDP-11 to do so is limited by the DL10's settings). ...also up to two [[PDP-10 I/O Bus]]ses (allowing it to be controlled by both processors in a multi-[[Central Processing Unit|CPU]] system). So, it could be connect
  5 KB (664 words) - 17:27, 7 November 2023
• MINITS
  ...[graphics terminal]]s, and provide [[Chaosnet]] [[front end]]s to [[KL10]] processors. [[Category: PDP-11 Operating Systems]]
  3 KB (347 words) - 08:50, 27 February 2024
• KD11-B CPU
  ...''' [[PDP-11]] [[Central Processing Unit|CPU]] for the [[PDP-11/05]] and [[PDP-11/10]] was a two-board [[microcode|micro-programmed]] processor contained on ...-cost PDP-11s, it did not support either hardware [[floating point]], or [[PDP-11 Extended Instruction Set|EIS]]. It did include an [[asynchronous serial lin
  11 KB (1,726 words) - 21:07, 2 July 2023
• RTS-8
  1 KB (166 words) - 00:32, 23 June 2020
• KB11-A CPU
  ...-B Floating-Point Processor]] and [[KT11-C Memory Management Unit]] of the PDP-11/45 plugged into the CPU's [[backplane]]. ...e special high-speed [[MS11 Semiconductor Memory System]], specific to the PDP-11/45, which plugged into a special [[bus]], the Fastbus, which was also part
  3 KB (395 words) - 21:08, 2 July 2023
• KB11-D CPU
  ...ocessing Unit|CPU]] is the later [[Central Processing Unit|CPU]] for the [[PDP-11/45]]; it differed from the earlier [[KB11-A CPU]] in that is used the [[syn ...e special high-speed [[MS11 Semiconductor Memory System]], specific to the PDP-11/45, which plugged into a special [[bus]], the Fastbus, which was also part
  2 KB (307 words) - 12:32, 11 October 2022
• KT11-C Memory Management Unit
  ...Memory Management]] architecture; in fact, the KT11-C is the archetype for PDP-11 memory management units. [[Category: PDP-11 UNIBUS Processors]]
  2 KB (231 words) - 02:38, 12 October 2022
• KE11-E Extended Instruction Set
  ...tional [[PDP-11 Extended Instruction Set]] for the [[KD11-A CPU]] of the [[PDP-11/40]]; it implements multiply, divide, and multi-bit shift instructions. It [[Category: PDP-11 UNIBUS Processors]]
  2 KB (304 words) - 02:33, 12 October 2022
• FP11-F Floating-Point Processor
  ...the [[hardware]] [[floating point]] option for the [[KD11-Z CPU]] of the [[PDP-11/44]]. It implements the full [[FP11 floating point]]; it consists of a sing [[Category: PDP-11 UNIBUS Processors]]
  961 bytes (149 words) - 02:20, 13 October 2022
• KD11-Z CPU
  ...the terminal letter code 'Z' was a tip to the fact that it was the last [[PDP-11]] CPU to be made out of discrete [[integrated circuit|chips]], and not a [[ Full [[PDP-11 Memory Management]] and a [[cache]] (the [[KK11-B Cache Memory|KK11-B]]) we
  4 KB (668 words) - 15:59, 6 February 2024
• KB11-B CPU
  ...U]] is the earlier CPU for the [[PDP-11/70]]. It is heavily based on the [[PDP-11/45]]'s [[KB11-A CPU]]; the -11/70 is basically an -11/45 with a [[cache]], Full [[PDP-11 Memory Management]] and the cache were standard on all KB11-B's. It used a
  3 KB (456 words) - 21:08, 2 July 2023
• KB11-C CPU
  The '''KB11-C''' [[Central Processing Unit|CPU]] is the later CPU for the [[PDP-11/70]]; it is basically the same as the earlier [[KB11-B CPU]], except that i '''''Note''''': ''The DEC documentation contains an error here. The "PDP-11/70 Maintenance and Installation Manual", EK-11070-MM-002, refers to the M81
  2 KB (260 words) - 21:03, 24 October 2022
• Co-processor
  ...oating point]] units of many [[PDP-11]]s); [[channel]]s are effectively co-processors which are specialized to doing [[input/output|I/O]].
  528 bytes (79 words) - 16:25, 15 December 2018

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