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  • 18 bytes (2 words) - 14:12, 30 April 2018
  • ...]] and [[KT11-C Memory Management Unit]] of the PDP-11/45 plugged into the CPU's [[backplane]]. ...ch plugged into a special [[bus]], the Fastbus, which was also part of the CPU's backplane.
    3 KB (395 words) - 21:08, 2 July 2023
  • ...h that and the optional [[KT11-C Memory Management Unit]] plugged into the CPU's [[backplane]]. ...ch plugged into a special [[bus]], the Fastbus, which was also part of the CPU's backplane.
    2 KB (307 words) - 12:32, 11 October 2022
  • ...for the [[PDP-11/70]]. It is heavily based on the [[PDP-11/45]]'s [[KB11-A CPU]]; the -11/70 is basically an -11/45 with a [[cache]], more [[main memory]] ...ing point]]), and up to four [[RH70 MASSBUS controller]]s plugged into the CPU's [[backplane]].
    3 KB (456 words) - 21:08, 2 July 2023
  • ...PU for the [[PDP-11/70]]; it is basically the same as the earlier [[KB11-B CPU]], except that it takes the later [[synchronous]] [[FP11-C Floating-Point P * [[KB11-B CPU]]
    2 KB (260 words) - 21:03, 24 October 2022

Page text matches

  • ...system, using the [[KB11-A CPU]] (early units, prior to 1976) or [[KB11-D CPU]] (later units) high-performance [[Central Processing Unit|CPUs]], implemen ...us]] to the CPU (called the Fastbus), which was implemented as part of the CPU's [[backplane]]; the other went to a second UNIBUS (the 'B' UNIBUS).
    6 KB (895 words) - 23:52, 29 February 2024
  • ...] system; it basically took the high-performance [[Central Processing Unit|CPU]] of the [[PDP-11/45]] (implemented in [[SSI]] [[Schottky TTL]] logic), and ...to what had been the FastBus high-speed memory interface on the PDP-11/45 CPU
    5 KB (729 words) - 23:43, 29 February 2024
  • ...([[KB11-A CPU|KB11-A]] and [[KB11-B CPU|KB11-B]] [[Central Processing Unit|CPU]] variants thereof, respectively); it was the progenitor of the semi-standa ...to the main CPU, and used a clock which was not synchronized to the basic CPU's clock.
    1 KB (201 words) - 02:17, 13 October 2022
  • ...[[KB11-D CPU|KB11-D]] and [[KB11-C CPU|KB11-C]] [[Central Processing Unit|CPU]] variants thereof, respectively); it was [[program compatible]] with the [ ...e FP11-B, it used an internal [[clock]] which is synchronized to the basic CPU's clock.
    1 KB (209 words) - 02:18, 13 October 2022
  • * [[KB11-A CPU|KB11-A]] - the early CPU in the [[PDP-11/45]], using the [[FP11-B Floating-Point Processor|FP11-B]] * [[KB11-B CPU|KB11-B]] - the early CPU in the [[PDP-11/70]], using the [[FP11-B Floating-Point Processor|FP11-B]]
    679 bytes (112 words) - 05:57, 29 August 2018
  • ...FIS floating point]].) It was tightly integrated with the CPU, so that the CPU processed a mix of 'regular' and floating point instructions. ...condition code bits, analagous to those for integer operations in the main CPU, recorded the outcome of operations.
    3 KB (406 words) - 20:42, 13 June 2023
  • ...]] and [[KT11-C Memory Management Unit]] of the PDP-11/45 plugged into the CPU's [[backplane]]. ...ch plugged into a special [[bus]], the Fastbus, which was also part of the CPU's backplane.
    3 KB (395 words) - 21:08, 2 July 2023
  • ...h that and the optional [[KT11-C Memory Management Unit]] plugged into the CPU's [[backplane]]. ...ch plugged into a special [[bus]], the Fastbus, which was also part of the CPU's backplane.
    2 KB (307 words) - 12:32, 11 October 2022
  • ...in the [[KB11-A CPU]] variant of the -11/45, and the M8108-YA in [[KB11-D CPU]] variant. They both plug into pre-wired slots in the [[Central Processing Unit|CPU]] [[backplane]].
    2 KB (231 words) - 02:38, 12 October 2022
  • ...for the [[PDP-11/70]]. It is heavily based on the [[PDP-11/45]]'s [[KB11-A CPU]]; the -11/70 is basically an -11/45 with a [[cache]], more [[main memory]] ...ing point]]), and up to four [[RH70 MASSBUS controller]]s plugged into the CPU's [[backplane]].
    3 KB (456 words) - 21:08, 2 July 2023
  • ...PU for the [[PDP-11/70]]; it is basically the same as the earlier [[KB11-B CPU]], except that it takes the later [[synchronous]] [[FP11-C Floating-Point P * [[KB11-B CPU]]
    2 KB (260 words) - 21:03, 24 October 2022
  • #Redirect [[KB11-C CPU]]
    24 bytes (4 words) - 03:17, 13 May 2018
  • #Redirect [[KB11-C CPU]]
    24 bytes (4 words) - 03:17, 13 May 2018
  • #Redirect [[KB11-B CPU]]
    24 bytes (4 words) - 03:18, 13 May 2018
  • #Redirect [[KB11-B CPU]]
    24 bytes (4 words) - 03:19, 13 May 2018
  • | [[KB11-A CPU]] | [[Central Processing Unit|CPU]]
    7 KB (1,015 words) - 22:43, 15 March 2024
  • ...d slots in the [[backplane]] of the the [[KB11-A CPU|KB11-A]] and [[KB11-D CPU]]. ...[UNIBUS]] of the PDP-11/45, and the other to the [[Central Processing Unit|CPU]] through a special [[bus]], the '''Fastbus'''. A PDP-11/45 could have up t
    3 KB (564 words) - 03:21, 6 February 2024
  • ...private [[bus]], allowed one CPU to [[interrupt]] or [[bootstrap]] another CPU. A multi-ported high-resolution 'Time of Day' [[clock]] was also provided.
    2 KB (257 words) - 22:57, 21 August 2021
  • ...aning of the lights, and the function of the switches, when used with that CPU or peripheral. * [[KA11 CPU|KA11]]
    3 KB (421 words) - 18:49, 27 February 2023
  • #Redirect [[KB11-A CPU]]
    24 bytes (4 words) - 18:04, 2 March 2019

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