(Such systems usually use a separate bus, such as the Extended UNIBUS in the PDP-11/44 and PDP-11/24, the Private Memory Interconnect in the PDP-11/84, and the memory bus in the PDP-11/70, between the CPU and main memory.)
When enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS address space to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
Each UNIBUS address space block has a pair of 16-bit registers which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)
All machines with a UNIBUS map start off with the map disabled; the software has to set it up and enable it before it commences operation.
Before that happens, the UNIBUS address space is statically mapped to the low 248 Kbytes of main memory; this allows the use of DMA devices on the UNIBUS during the bootstrap process, and initial system startup.
|v • d • e PDP-11 Computers and Peripherals|
| Unibus PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 • PDP-11/05 • PDP-11/10 • PDP-11/34 • PDP-11/04 • PDP-11/44 • PDP-11/60 • PDP-11/24 • PDP-11/84 • PDP-11/94
Clones: CM 1420