The PDP-11/84 is the UNIBUS-capable twin to the QBUS-only PDP-11/83; both used the KDJ11-B CPU (with its PMI bus). The -11/84 added a KTJ11-B UNIBUS adapter to provide its UNIBUS, and had a custom main backplane (H9277-A, DEC part number 70-20650-01) to support it.
Quoting: Introduced in 1988. Based on the J-11 chip set, DEC originally wanted the clock speed to be 20MHz, but it couldn't be done on time, so the actual speed was 18MHz. It was the fastest CPU of the PDP-11's anyhow. The high-end configuration had up to 4MB RAM on PMI (Private Memory Interconnect) and a floating-point accelerator.
The UNIBUS-based PDP-11/84 was for those customers, who wanted more I/O throughput or had some legacy equipment.
The box on the picture to the left is a BA123 which was a popular enclosure for QBUS machines. Apart from the 12x4-slot QBUS backplane, it had five slots for storage units, e.g. room for two or three harddisks, a tape drive (TK50 here) and floppy.
- PDP-11/84 System Technical and Reference Manual (EK-1184E-TM-001)
- PDP-11/84 System Maintenance Guide (EK-1184A-MG-001)
- 11/84 Field Maintenance Print Set (MP-02015-01)
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PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94
Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FIS floating point • FP11 floating point • PDP-11 Commercial Instruction Set • PDP-11 Memory Management • PDP-11 stacks • PDP-11 family differences