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• Synchronous Backplane Interconnect
  ...e high-speed [[bus]] which connected the major functional units ([[Central Processing Unit|CPU]], [[main memory]], [[Input/output|I/O]] adapters, etc), in early ...me other operation might use some of the slots before the one in which the data is returned.
  3 KB (455 words) - 17:09, 14 May 2024
• KK11-B Cache Memory
  ...D11-Z CPU]] of the [[PDP-11/44]], a high-speed [[cache]] for the [[Central Processing Unit|CPU]]. Each cache entry was 30 bits wide, containing two data bytes; also a tag field for cache entries, 9 bits wide (covering [[Extended
  3 KB (501 words) - 16:27, 6 February 2024
• KY11-J Programmer's Console
  ...in [[main memory]], and start, [[halt]] and [[single-step]] the [[Central Processing Unit|CPU]]. The 'Address/Data' indicator array display memory [[address]]es and data. The 'Run' light indicates that the CPU is [[execute|executing]] [[instruct
  2 KB (372 words) - 18:05, 25 January 2022
• KDJ11-D CPU
  ...KDJ11-D/S''' in the later variant (below), is the third [[QBUS]] [[Central Processing Unit|CPU]] card using the [[J-11 chip set]] of the [[PDP-11]] of the [[KDJ1 ...f the logic into two [[gate array]]s (DC7063 for control, and DC7064 for [[data path]]s), which made room for up to 1.5MB of memory.
  3 KB (529 words) - 12:01, 15 August 2022
• DEC Semiconductor Chips
  | NVAX Central Processing Unit [[#ref_25|[25]]] | F-11 Data [[#ref_1|[1]]][[#ref_30|[30]]]
  36 KB (3,420 words) - 05:36, 5 November 2022
• M7259 Parity Control Module
  ...is thus not supported for MM11-L/MM11-U units in a [[PDP-11/05]] [[Central Processing Unit|CPU]] backplane. On a read cycle, when the memory unit has put the data on the UNIBUS, it asserts that signal; on seeing it, the M7259 then generat
  4 KB (621 words) - 22:21, 6 July 2022
• KA750 CPU
  The '''KA750 CPU''' was the [[Central Processing Unit|CPU]] of the [[VAX-11/750]]. It was a [[synchronous]] [[microcode]]d d * L0002 Data Path Module (DPM) - arithmetical and logical functions, micro-sequencer
  3 KB (519 words) - 03:33, 18 May 2024
• KDF11-U CPU pinout
  ...mi-separate [[UNIBUS]], and [[Extended UNIBUS]] used between the [[Central Processing Unit|CPU]] and [[main memory]]; others are part of the connection between t | FN1 || K12-D4 || DATA TERM RDY 2
  8 KB (1,587 words) - 16:14, 6 February 2024
• CPU/Memory Interconnect
  ...he main [[bus]] which connects the main sub-systems (such as the [[Central Processing Unit|CPU]] and [[main memory]], as well as [[input/output|I/O]] adapters) i ...ns of the CMI are to do priority arbitration for use of the bus, and carry data between the sub-systems, as well as carrying [[interrupt]]s. It is also use
  3 KB (406 words) - 20:36, 18 May 2024
• VAX Bus Interconnect
  ...nnects all the main sub-systems, such as [[main memory]] and the [[Central Processing Unit|CPU]] (including [[multi-processor]]s); in the others, it is only used ...ully distributed among all the nodes, with no 'master' node), and transfer data between the sub-systems, as well as carrying [[interrupt]]s. It is also use
  4 KB (536 words) - 20:40, 23 May 2024
• VAXELN
  Such applications include the typical scientific and industrial data processing situations in which the computer's operation has to be precisely synchroniz
  2 KB (349 words) - 22:22, 28 June 2022
• VAXstation I
  {{InfoboxVAX-Data ...r both its [[main memory]] and [[input/output|I/O]] [[bus]]. Its [[Central Processing Unit|CPU]] was the [[MicroVAX I]]; the [[VCB01 Video Controller]] provided
  1 KB (147 words) - 17:19, 15 January 2024
• KD32 CPU
  [[File:M7135_DATAPATH.JPG|300px|thumb|rightt|M7135 MicroVAX I Data Path Module (DAP)]] The '''KD32''' (also called the '''KA610''') was the [[Central Processing Unit|CPU]] in the [[MicroVAX I]], and its [[workstation]] form, the [[VAXst
  2 KB (298 words) - 06:29, 28 June 2022
• Subroutine call
  ...l [[instruction]] in the [[object code]]; on systems which interpolate a [[data network]] between components of the system, there are [[protocol]]s which i
  463 bytes (63 words) - 18:41, 6 February 2023
• VAX-11/780 & VAX-11/782 Revision Control
  5.2 KA780 11780 CENTRAL PROCESSING UNIT cases excessive data lates occur with the RM03 disks or line drop
  70 KB (7,782 words) - 14:04, 2 July 2022
• KA785 CPU
  The '''KA785 CPU''' was the [[Central Processing Unit|CPU]] for the [[VAX-11/785]]. | 13 || M7471 || DAP || Data Path
  2 KB (205 words) - 16:36, 1 July 2022
• Symbolics
  ...-volume custom [[Central Processing Unit|CPU]] of the LISP machine (tagged data types; [[garbage collection]]) left them unable to keep up.
  2 KB (213 words) - 10:20, 10 January 2024
• KA730 CPU
  * Data Path (DAP - M8390) ...data-handling bus called the Port Bus (again with a 32 bit data path, for data only) runs from the DAP module to the FPA and the [[RB730 Integrated Disk C
  2 KB (234 words) - 00:54, 6 July 2022
• Installing, Configuring, and Testing A VMS V4.7 Local Area VAXcluster on SIMH
  ...ources as user and application data disks, printers, and distributed batch processing facilities. ...r resources, though they may also sometimes provide disk serving and batch processing resources.
  112 KB (13,727 words) - 18:09, 30 January 2024
• Standard Disk Interconnect
  ...DSA), used with [[PDP-11]]s and with [[VAX]] single and multiple [[Central Processing Unit|CPU]] systems. ...haracteristics, direct its mechanical operation, store data on or retrieve data from it, and recognize and recover from error conditions.
  4 KB (512 words) - 15:29, 29 December 2023

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