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  • == [[VAX 9000 series|VAX 9000]] Modules == == [[DEC 4000]] Modules ==
    51 KB (6,185 words) - 15:20, 15 January 2024

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  • ...the [[UNIBUS]] general system [[bus]] from [[Digital Equipment Corporation|DEC]]. It was widely used in later [[PDP-11]]s and smaller [[VAX]]en. ...US added support for block transfers, to increase the transfer rate of the bus.
    13 KB (2,043 words) - 23:27, 14 January 2024
  • | bus arch= [[UNIBUS]]/[[MASSBUS]]/memory bus ...ability to support up to 4 Mbytes of [[main memory]] via a new Main Memory Bus, and changes to the CPU to allow access to that much memory
    5 KB (729 words) - 23:43, 29 February 2024
  • '''Digital Equipment Corporation''', or '''DEC''', was a large computer company (at one time, the second-largest in the wo ...an old wool mill in Maynard, Massachusetts. The original product line was modules, [[System Module]]s. Once those were established, they started producing co
    5 KB (624 words) - 19:19, 19 March 2024
  • | BUS-UNIBUS = 1 @ 1.5MB/s [[#ref_1|[1]]] ...ge architecture, the [[Central Processing Unit|CPU]] was shrunk to three [[DEC card form factor|hex]] boards. The machine seems to have been most popular
    5 KB (708 words) - 12:22, 29 March 2023
  • | BUS-Qbus = 1 @ 3.3MB/s ...Digital Equipment Corporation|DEC]]. It used the [[QBUS]] as its primary [[bus]] between the [[Central Processing Unit|CPU]] (the [[KD32 CPU]]) and [[main
    10 KB (1,543 words) - 02:27, 7 May 2024
  • ...versions '''M7820''' and '''M7821''') is a [[Digital Equipment Corporation|DEC]] [[FLIP CHIP]] which implements the '[[interrupt]] control' function for t ...ars that many of them were attempts to get rid of [[race]] issues in the [[bus grant|grant]]-passing [[arbiter|arbitration]] circuity, which is often quit
    5 KB (820 words) - 04:04, 28 November 2023
  • It uses a radial bus configuration instead of the conventional daisy-chain (serial) method; thus It consists of two [[DEC card form factor|hex]] (8.5” by 15.6”) cards, which a mounted in a UNIBUS [[backplane]] of a [[PDP-11]] o
    6 KB (980 words) - 10:55, 31 August 2023
  • (also via AFS by the path: by whether or not it has a file named FIXED in the
    29 KB (4,794 words) - 18:15, 16 December 2018
  • ...ve contains a fair amount of [[electronics]], in the form of [[FLIP CHIP]] modules in a 19" wide [[wire-wrap]] [[backplane]] (mounted fore and aft in the driv ...]); they also convert the Positive bus from the controller to the Negative bus native to the TU10. The Master and Slave variants use the same wire-wrap ba
    9 KB (1,330 words) - 01:11, 10 February 2024
  • 9.6.1.3 Flags Usage by Interrupt Procedure 14.8.1 Bus Lock
    890 KB (107,817 words) - 03:20, 3 January 2024
  • You build the configuration dependent modules. This is not something I'm fast with (yet). ...of goodies. It is still being catalogued, bagged, mirrored and taged, but by the
    25 KB (3,983 words) - 02:05, 11 April 2019
  • * G110 - [[DEC card form factor|hex-width]] memory control logic and data channels ...arity]] variant of the MM11-L, the '''MM11-LP'''; parity versions (denoted by a 'P' suffix) were available for all of the above. The MM11-LP added a dual
    5 KB (841 words) - 07:14, 25 March 2022
  • ...variant thereof) is the name given to the 'bus' which is present on the [[DEC edge connector contact identification|C and D connectors]] of a [[QBUS#Back It is not actually a full [[bus]] (i.e. a given pin is not connected to 'all' instances of that pin, in eve
    3 KB (524 words) - 16:15, 22 June 2023
  • ...tems Option, the [[KT11-B Paging Option|KT11-B]] does not have the usual [[DEC]] Technical Manual. This page attempts to provide at least the high-level p ...t, and low bits - i.e. addresses within a page - from the incoming address bus).
    31 KB (4,983 words) - 18:22, 2 July 2023
  • ...PDP-11/70]]. It was 32 bits wide, to interface to the -11/70's Main Memory Bus, and provided byte [[parity]] (4 bits/double-[[word]]). Read, Write, and Ex ...ck modules), and the '''MJ11-B''' (which used 64KB modules). Both kinds of modules had to be installed in pairs (since they were 16 bits wide, and the MJ11 de
    5 KB (865 words) - 03:22, 6 February 2024
  • ...11/70]]. It was 32 [[bit]]s wide, to interface to the -11/70's Main Memory Bus, and provided [[Error-correcting code|ECC]] (7 bits/double-[[word]]), which * the MK11-B (which used 32KB and 64KB [[MS11-K MOS memory]] array modules)
    8 KB (1,276 words) - 03:23, 6 February 2024
  • ...cles on the bus, perform read-modify-write bus cycles, or do block 'burst' bus transfers. ...''not'' buffered, and must be held valid for the duration of the resultant bus cycle.
    5 KB (766 words) - 03:15, 25 November 2022
  • ...[VAX Bus Interconnect|VAXBI]] buses, and 8 [[VME]] buses; at least one XMI bus was required. ...two 2GB memory boards, but in this case only 3.5GB would actually be used by [[OpenVMS]] (the remaining 0.5GB of physical address space being required f
    2 KB (297 words) - 00:42, 7 May 2024
  • ...l; it uses the M9724-YA card, which has an ECO modifying the operation of 'Bus Hog' mode (see below). ...e start of the bus can be configured to do [[Non-Processor Request|NPR]] [[bus grant]]s.
    6 KB (951 words) - 15:40, 25 February 2022
  • ...f the earlier [[PDP-6]] architecture) from [[Digital Equipment Corporation|DEC]]. It was intended as a small, low-cost entry model, not as a replacement f The KS10 is organized around a [[synchronous]] [[bus]] (carried only on the main [[backplane]]), to which are attached the [[mic
    8 KB (1,237 words) - 19:48, 14 July 2023

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